| // Copyright 2023 The Fuchsia Authors |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| |
| // This file contains x64 specific test expectations. |
| { |
| actions: [ |
| { |
| include: "bionic_unit_tests_static.json5", |
| }, |
| { |
| type: "expect_failure", |
| matchers: [], |
| }, |
| { |
| type: "skip", |
| matchers: [ |
| "cpu_target_features.has_expected_aarch64_compiler_values", |
| "cpu_target_features.has_expected_x86_compiler_values", |
| |
| // Test for a RISC-V syscall. Skipped on other architectures. |
| "sys_cachectl.__riscv_*", |
| "sys_hwprobe.__riscv_*", |
| |
| // These tests currently pass on arm64 and are SKIPPED on x86_64. Our test harness thinks skipped tests fail. |
| "MemtagStackTest.*", |
| "*MemtagGlobalsTest.*", |
| "MemtagNoteTest.*", |
| "scs_test.stack_overflow", |
| "scs_DeathTest.stack_overflow", |
| "stack_unwinding.unwind_through_signal_frame", |
| "stack_unwinding.unwind_through_signal_frame_SA_SIGINFO", |
| "static_tls_layout.arm", |
| "static_tls_layout_DeathTest.arm", |
| ], |
| }, |
| ], |
| } |