blob: a84383c4d21615c67f4a91a36b250ff8a0035ce3 [file] [log] [blame]
# Copyright 2018 The Fuchsia Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be found in the LICENSE file.
#
# WARNING: This file is machine generated by fidlgen.
include <test/name/c/fidl.h>
test_name_HandlesInTypesInLine {
normal_handle flags[fidl_handle_presence, int32]
handle_in_vecInLine fidl_vector
handle_in_arrayInLine array[flags[fidl_handle_presence, int32], 5]
handle_in_mixed_vec_arrayInLine fidl_vector
union_with_handleInLine test_name_UnionWithHandleInLine
} [packed]
test_name_HandlesInTypesOutOfLine {
handle_in_vecOutOfLine array[flags[fidl_handle_presence, int32]]
handle_in_mixed_vec_arrayOutOfLine array[array[flags[fidl_handle_presence, int32], 5]]
} [packed]
test_name_HandlesInTypesHandles {
normal_handle zx_vmo
handle_in_vec array[zx_vmo]
handle_in_arrayHandles array[zx_vmo, 5]
handle_in_mixed_vec_array array[array[zx_vmo, 5]]
} [packed]
test_name_UnionWithHandleInLine [
h fidl_union_member[test_name_UnionWithHandleTag_h, flags[fidl_handle_presence, int32]]
]
test_name_UnionWithHandleOutOfLine [
void void
][varlen]
test_name_UnionWithHandleHandles [
h zx_vmo
][varlen]