src/tests/fidl/conformance_suite/mix_and_match.test.fidl

// Copyright 2019 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

library conformance;

using zx;

table XUnionInTable {
    1: string before;
    2: SampleXUnion xu;
    3: string after;
};

struct TestXUnionInTable {
    XUnionInTable value;
};

union IpAddressConfig {
    1: array<uint32>:6 padding_size_24_align_4;
    2: bool dhcp;
};

struct InterfaceConfig {
    string name;
    IpAddressConfig ip_address_config;
};

struct TestAddEthernetDeviceRequest {
    string topological_path;
    InterfaceConfig config;
    // TODO(fxbug.dev/7947): Use 'EthernetDevice device;' instead.
    uint32 this_should_be_a_handle;
};

struct NodeAttributes {
    uint32 mode;
    uint64 id;
    uint64 content_size;
    uint64 storage_size;
    uint64 link_count;
    uint64 creation_time;
    uint64 modification_time;
};

struct FileGetAttrResponse {
    zx.status s;
    NodeAttributes attributes;
};

struct Int64Struct {
    int64 x;
};

union SimpleUnion {
    1: int32 i32;
    2: int64 i64;
    3: Int64Struct s;
    4: string str;
};

flexible union SampleXUnion {
    1: uint32 u;
    2: SimpleUnion su;
    3: SimpleTable st;
};

flexible resource union SampleResourceXUnion {
    1: uint32 u;
    2: SimpleUnion su;
    3: SimpleTable st;
};

union SampleStrictXUnion {
    1: uint32 u;
    2: SimpleUnion su;
    3: SimpleTable st;
};

struct TestInlineXUnionInStruct {
    string before;
    SampleXUnion xu;
    string after;
};

struct TestOptionalXUnionInStruct {
    string before;
    SampleXUnion? xu;
    string after;
};

struct TestStrictXUnionInStruct {
    SampleStrictXUnion xu;
};

struct TestFlexibleXUnionInStruct {
    SampleXUnion xu;
};

resource struct TestFlexibleResourceXUnionInStruct {
    SampleResourceXUnion xu;
};

// TODO(fxbug.dev/36441): Allow bindings to compile on host with handles.
[BindingsDenylist = "llcpp"]
resource struct FidlvizDemo {
    uint8 f1;
    int8 f2;
    uint16 f3;
    uint32 f4;
    uint64 f5;
    uint8 f6;
    uint8 f7;
    uint16 f8;
    float32 f9;
    float64 f10;
    bool f11;
    bool f12;
    string f13;
    string? f14;
    string f15;
    handle? f16;
    handle f17;
    array<uint8>:3 f18;
    vector<float64> f19;
    vector<uint8>? f20;
    vector<uint8> f21;
    FidlvizBits f22;
    FidlvizEnum f23;
    FidlvizStruct1 f24;
    FidlvizStruct2 f25;
    FidlvizStruct1? f26;
    FidlvizStruct2? f27;
    FidlvizTable f28;
    FidlvizTable f29;
    FidlvizUnion? f30;
    FidlvizUnion f31;
};

bits FidlvizBits : uint8 {
    A = 1;
    B = 2;
    C = 4;
};

enum FidlvizEnum : uint8 {
    A = 42;
};

struct FidlvizStruct1 {
};

struct FidlvizStruct2 {
    uint64 x;
};

table FidlvizTable {
    1: bool f1;
    2: reserved;
    3: bool f3;
};

union FidlvizUnion {
    1: reserved;
    2: reserved;
    3: reserved;
    4: reserved;
    5: reserved;
    6: reserved;
    7: string f7;
};