src/graphics/drivers/aml-gpu/aml_gpu.bind

// Copyright 2020 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

composite aml_gpu;

using fuchsia.amlogic.platform;
using fuchsia.hardware.clock;
using fuchsia.platform;
using fuchsia.devicetree;
using fuchsia.hardware.registers;

primary node "pdev" {
  if fuchsia.BIND_PLATFORM_DEV_DID == fuchsia.platform.BIND_PLATFORM_DEV_DID.DEVICETREE {
    fuchsia.devicetree.FIRST_COMPATIBLE == "amlogic,gpu";
  } else {
    fuchsia.BIND_PROTOCOL == fuchsia.platform.BIND_PROTOCOL.DEVICE;
    fuchsia.BIND_PLATFORM_DEV_VID == fuchsia.amlogic.platform.BIND_PLATFORM_DEV_VID.AMLOGIC;
    fuchsia.BIND_PLATFORM_DEV_DID == fuchsia.amlogic.platform.BIND_PLATFORM_DEV_DID.MALI_INIT;
    accept fuchsia.BIND_PLATFORM_DEV_PID {
      fuchsia.amlogic.platform.BIND_PLATFORM_DEV_PID.S912,
      fuchsia.amlogic.platform.BIND_PLATFORM_DEV_PID.S905D2,
      fuchsia.amlogic.platform.BIND_PLATFORM_DEV_PID.S905D3,
      fuchsia.amlogic.platform.BIND_PLATFORM_DEV_PID.T931,
      fuchsia.amlogic.platform.BIND_PLATFORM_DEV_PID.A311D,
    }
  }
}

node "register-reset" {
  fuchsia.hardware.registers.Service == fuchsia.hardware.registers.Service.ZirconTransport;
}

optional node "clock-gp0-pll" {
  fuchsia.hardware.clock.Service == fuchsia.hardware.clock.Service.ZirconTransport;
}