sdk/fidl/fuchsia.hardware.audio.signalprocessing/dai_interconnect.fidl

// Copyright 2023 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
library fuchsia.hardware.audio.signalprocessing;
using zx;

/// Plug state for the interconnect.
/// If the driver reports a `plug_detect_capabilities` equal to HARDWIRED, then the driver should
/// respond to `WatchElementState` only the first time it is called for a given interconnect, with
/// `plugged` set to true and `plug_state_time` set to time '0'.
@available(added=12)
type PlugState = table {
    /// Indicates whether the interconnect is currently plugged in.
    ///
    /// Required
    1: plugged bool;

    /// Indicates when the current `plugged` state was set, using `ZX_CLOCK_MONOTONIC`.
    /// Cannot be negative.
    ///
    /// Required.
    2: plug_state_time zx.Time;
};

/// Plug detection capabilities for the interconnect.
@available(added=12)
type PlugDetectCapabilities = flexible enum {
    /// Interconnect is hardwired (will always be plugged in).
    HARDWIRED = 0;

    /// Interconnect can be unplugged/plugged and can asynchronously notify of plug state changes.
    CAN_ASYNC_NOTIFY = 1;
};

/// Endpoint types.
@available(added=12, removed=20)
type EndpointType = flexible enum : uint8 {
    /// The endpoint represents a ring buffer.
    /// A ring buffer processing element's id allows for multi-ring buffer topologies to
    /// be supported by a driver providing the fuchsia.hardware.audio/Composite API.
    RING_BUFFER = 1;

    /// The endpoint represents a Digital Audio Interface Interconnect,
    /// e.g. connecting an SoC audio subsystem to a DAC + amplifier hardware codec.
    DAI_INTERCONNECT = 2;
};

/// Parameters for an `Element` with `type` equal to `ENDPOINT`.
@available(added=12, removed=20)
type Endpoint = table {
    /// Specifies what the endpoint represents.
    ///
    /// Required.
    1: type EndpointType;

    /// Plug Detect Capabilities.
    /// Required.
    2: plug_detect_capabilities PlugDetectCapabilities;
};

/// State for an `Element` with `type` equal to `ENDPOINT`.
@available(added=12, removed=20)
type EndpointElementState = table {
    /// If included the plug detect state for this endpoint.
    ///
    /// Required for servers.
    1: plug_state PlugState;
};

/// Parameters for an `Element` with `type` equal to `DAI_INTERCONNECT`.
@available(added=20)
type DaiInterconnect = table {
    /// Plug Detect Capabilities.
    ///
    /// Required.
    1: plug_detect_capabilities PlugDetectCapabilities;
};

/// State for an `Element` with `type` equal to `DAI_INTERCONNECT`.
@available(added=20)
type DaiInterconnectElementState = table {
    /// The plug state for this DAI interconnect.
    ///
    /// Required.
    1: plug_state PlugState;

    /// The driver's best estimate of the external delay beyond this DAI endpoint, as the pipeline
    /// is currently configured.
    ///
    /// `external_delay` must be taken into account by the client when determining the requirements
    /// for minimum lead time (during playback) and minimum capture delay (during capture).
    ///
    /// If not included, `external_delay` is unknown; the client may treat it however it chooses
    /// (e.g. consider it zero or some other duration, autodetect it, etc).
    ///
    /// Optional.
    2: external_delay zx.Duration;
};