Google Git
Sign in
fuchsia / fuchsia / main / . / zircon / kernel / lib / devicetree / testing / data / synthetic
tree: 2e6ea527776c54ac0dbec2184dc52675dba6428e [path history] [tgz]
  1. arm_gic2_no_msi.dts
  2. arm_gic3_four_stride.dts
  3. arm_gic3_stride.dts
  4. arm_gic3_subsumed_stride.dts
  5. arm_idle_states.dts
  6. arm_idle_states_and_domain.dts
  7. arm_idle_states_multiple.dts
  8. arm_idle_states_multiple_with_invalid.dts
  9. arm_qcom_rng.dts
  10. arm_qcom_rng_configured.dts
  11. arm_timer.dts
  12. arm_timer_mmio.dts
  13. arm_timer_mmio_invalid_frames.dts
  14. arm_timer_mmio_no_frames.dts
  15. arm_timer_mmio_no_frequency_override.dts
  16. arm_timer_no_frequency_override.dts
  17. chosen.dts
  18. chosen_unknown_intc.dts
  19. chosen_with_console.dts
  20. chosen_with_console_aml.dts
  21. chosen_with_console_and_stdout_path.dts
  22. chosen_with_kaslr_and_rng.dts
  23. chosen_with_kaslr_only.dts
  24. chosen_with_reg_offset.dts
  25. chosen_with_rng_only.dts
  26. chosen_with_translation.dts
  27. complex_no_properties.dts
  28. complex_with_alias.dts
  29. complex_with_alias_first.dts
  30. cpus_arm.dts
  31. cpus_arm_no_cpu_map.dts
  32. cpus_arm_single_cell.dts
  33. cpus_no_cpu_map_riscv.dts
  34. cpus_riscv.dts
  35. cpus_riscv_nested_clusters.dts
  36. empty.dts
  37. memory.dts
  38. memory_complex.dts
  39. memory_reservations.dts
  40. plic_riscv.dts
  41. psci-hvc.dts
  42. psci-smc.dts
  43. qcom_msm_watchdog.dts
  44. qcom_msm_watchdog_multiple_regs.dts
  45. ramoops.dts
  46. README.md
  47. reserved_memory.dts
  48. serial_number.dts
  49. serial_number_bootargs.dts
  50. simple_with_properties.dts
  51. simple_with_status.dts
zircon/kernel/lib/devicetree/testing/data/synthetic/README.md

Devicetree test data

This directory contains devicetree source (.dts) for use in devicetree tests. The corresponding binary files (.dtb) are compiled during build.

Powered by Gitiles| Privacy| Termstxt json