[kernel][arm64][mmu] use 4K page granules for the bootstrap trampoline
Currently the start.S code is more clever than it probably should be and
compile time decides what size page granules to use to map the large
(1GB/512MB) page around the current code at boot to trampoline to the
high address. It's currently set to use 64KB page granules in the
temporary address space it uses. This is generally fine except 64K pages
are technically optional according to the ARM ARM.
Switch to using 4K pages always which are more or less mandatory, or at
least mandatory to zircon. This avoids any issues booting on cpus that
don't support 64K pages.
This reduces the size of the physical address space the kernel needs to
be physically located in at boot time, but 39 bits is still pretty good,
and it's unlikely we'll encounter a cpu where the kernel is loaded
outside of that range.
Change-Id: Idc962ebf39d689ec124f20392f910d38824c0b3c
Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/464055
Commit-Queue: Travis Geiselbrecht <travisg@google.com>
Reviewed-by: Adrian Danis <adanis@google.com>
diff --git a/zircon/kernel/arch/arm64/include/arch/arm64/mmu.h b/zircon/kernel/arch/arm64/include/arch/arm64/mmu.h
index 8c40ff5..7cfbd0d 100644
--- a/zircon/kernel/arch/arm64/include/arch/arm64/mmu.h
+++ b/zircon/kernel/arch/arm64/include/arch/arm64/mmu.h
@@ -35,10 +35,6 @@
#define MMU_USER_SIZE_SHIFT 48
#endif
-#ifndef MMU_IDENT_SIZE_SHIFT
-#define MMU_IDENT_SIZE_SHIFT 42 /* Max size supported by block mappings */
-#endif
-
// See ARM DDI 0487B.b, Table D4-25 for the maximum IPA range that can be used.
// This size is based on a 4KB granule and a starting level of 1. We chose this
// size due to the 40-bit physical address range on Cortex-A53.
@@ -50,6 +46,16 @@
#define MMU_USER_PAGE_SIZE_SHIFT (USER_PAGE_SIZE_SHIFT)
#define MMU_GUEST_PAGE_SIZE_SHIFT (USER_PAGE_SIZE_SHIFT)
+// For the identity map used temporarily in start.S as the cpu is trampolining
+// up to the high kernel address, set the max size of the temporary address
+// space constructed.
+//
+// Currently if between 30 and 39 the code will automatically use 4K base page
+// granules, which is maximally compatible with all cores.
+#ifndef MMU_IDENT_SIZE_SHIFT
+#define MMU_IDENT_SIZE_SHIFT 39
+#endif
+
#if MMU_IDENT_SIZE_SHIFT < 25
#error MMU_IDENT_SIZE_SHIFT too small
#elif MMU_IDENT_SIZE_SHIFT <= 29 /* Use 2MB block mappings (4K page size) */
