| // Copyright 2019 The Fuchsia Authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| |
| #pragma once |
| |
| namespace msm8x53 { |
| |
| // Branch Clock Register Offsets. |
| constexpr uint32_t kApc0VoltageDroopDetectorGpll0Cbcr = 0x78004; |
| constexpr uint32_t kApc1VoltageDroopDetectorGpll0Cbcr = 0x79004; |
| constexpr uint32_t kBimcGfxCbcr = 0x59034; |
| constexpr uint32_t kBimcGpuCbcr = 0x59030; |
| constexpr uint32_t kBlsp1Qup1I2cAppsCbcr = 0x2008; |
| constexpr uint32_t kBlsp1Qup1SpiAppsCbcr = 0x2004; |
| constexpr uint32_t kBlsp1Qup2I2cAppsCbcr = 0x3010; |
| constexpr uint32_t kBlsp1Qup2SpiAppsCbcr = 0x300c; |
| constexpr uint32_t kBlsp1Qup3I2cAppsCbcr = 0x4020; |
| constexpr uint32_t kBlsp1Qup3SpiAppsCbcr = 0x401c; |
| constexpr uint32_t kBlsp1Qup4I2cAppsCbcr = 0x5020; |
| constexpr uint32_t kBlsp1Qup4SpiAppsCbcr = 0x501c; |
| constexpr uint32_t kBlsp1Uart1AppsCbcr = 0x203c; |
| constexpr uint32_t kBlsp1Uart2AppsCbcr = 0x302c; |
| constexpr uint32_t kBlsp2Qup1I2cAppsCbcr = 0xc008; |
| constexpr uint32_t kBlsp2Qup1SpiAppsCbcr = 0xc004; |
| constexpr uint32_t kBlsp2Qup2I2cAppsCbcr = 0xd010; |
| constexpr uint32_t kBlsp2Qup2SpiAppsCbcr = 0xd00c; |
| constexpr uint32_t kBlsp2Qup3I2cAppsCbcr = 0xf020; |
| constexpr uint32_t kBlsp2Qup3SpiAppsCbcr = 0xf01c; |
| constexpr uint32_t kBlsp2Qup4I2cAppsCbcr = 0x18020; |
| constexpr uint32_t kBlsp2Qup4SpiAppsCbcr = 0x1801c; |
| constexpr uint32_t kBlsp2Uart1AppsCbcr = 0xc03c; |
| constexpr uint32_t kBlsp2Uart2AppsCbcr = 0xd02c; |
| constexpr uint32_t kCamssAhbCbcr = 0x56004; |
| constexpr uint32_t kCamssCciAhbCbcr = 0x5101c; |
| constexpr uint32_t kCamssCciCbcr = 0x51018; |
| constexpr uint32_t kCamssCppAhbCbcr = 0x58040; |
| constexpr uint32_t kCamssCppAxiCbcr = 0x58064; |
| constexpr uint32_t kCamssCppCbcr = 0x5803c; |
| constexpr uint32_t kCamssCsi0AhbCbcr = 0x4e040; |
| constexpr uint32_t kCamssCsi0Cbcr = 0x4e03c; |
| constexpr uint32_t kCamssCsi0Csiphy3pCbcr = 0x58090; |
| constexpr uint32_t kCamssCsi0phyCbcr = 0x4e048; |
| constexpr uint32_t kCamssCsi0phytimerCbcr = 0x4e01c; |
| constexpr uint32_t kCamssCsi0pixCbcr = 0x4e058; |
| constexpr uint32_t kCamssCsi0rdiCbcr = 0x4e050; |
| constexpr uint32_t kCamssCsi1AhbCbcr = 0x4f040; |
| constexpr uint32_t kCamssCsi1Cbcr = 0x4f03c; |
| constexpr uint32_t kCamssCsi1Csiphy3pCbcr = 0x580a0; |
| constexpr uint32_t kCamssCsi1phyCbcr = 0x4f048; |
| constexpr uint32_t kCamssCsi1phytimerCbcr = 0x4f01c; |
| constexpr uint32_t kCamssCsi1pixCbcr = 0x4f058; |
| constexpr uint32_t kCamssCsi1rdiCbcr = 0x4f050; |
| constexpr uint32_t kCamssCsi2AhbCbcr = 0x3c040; |
| constexpr uint32_t kCamssCsi2Cbcr = 0x3c03c; |
| constexpr uint32_t kCamssCsi2Csiphy3pCbcr = 0x580b0; |
| constexpr uint32_t kCamssCsi2phyCbcr = 0x3c048; |
| constexpr uint32_t kCamssCsi2phytimerCbcr = 0x4f068; |
| constexpr uint32_t kCamssCsi2pixCbcr = 0x3c058; |
| constexpr uint32_t kCamssCsi2rdiCbcr = 0x3c050; |
| constexpr uint32_t kCamssCsiVfe0Cbcr = 0x58050; |
| constexpr uint32_t kCamssCsiVfe1Cbcr = 0x58074; |
| constexpr uint32_t kCamssGp0Cbcr = 0x54018; |
| constexpr uint32_t kCamssGp1Cbcr = 0x55018; |
| constexpr uint32_t kCamssIspifAhbCbcr = 0x50004; |
| constexpr uint32_t kCamssJpeg0Cbcr = 0x57020; |
| constexpr uint32_t kCamssJpegAhbCbcr = 0x57024; |
| constexpr uint32_t kCamssJpegAxiCbcr = 0x57028; |
| constexpr uint32_t kCamssMclk0Cbcr = 0x52018; |
| constexpr uint32_t kCamssMclk1Cbcr = 0x53018; |
| constexpr uint32_t kCamssMclk2Cbcr = 0x5c018; |
| constexpr uint32_t kCamssMclk3Cbcr = 0x5e018; |
| constexpr uint32_t kCamssMicroAhbCbcr = 0x5600c; |
| constexpr uint32_t kCamssTopAhbCbcr = 0x5a014; |
| constexpr uint32_t kCamssVfe0Cbcr = 0x58038; |
| constexpr uint32_t kCamssVfe1AhbCbcr = 0x58060; |
| constexpr uint32_t kCamssVfe1AxiCbcr = 0x58068; |
| constexpr uint32_t kCamssVfe1Cbcr = 0x5805c; |
| constexpr uint32_t kCamssVfeAhbCbcr = 0x58044; |
| constexpr uint32_t kCamssVfeAxiCbcr = 0x58048; |
| constexpr uint32_t kDccCbcr = 0x77004; |
| constexpr uint32_t kGp1Cbcr = 0x8000; |
| constexpr uint32_t kGp2Cbcr = 0x9000; |
| constexpr uint32_t kGp3Cbcr = 0xa000; |
| constexpr uint32_t kMdssAhbCbcr = 0x4d07c; |
| constexpr uint32_t kMdssAxiCbcr = 0x4d080; |
| constexpr uint32_t kMdssByte0Cbcr = 0x4d094; |
| constexpr uint32_t kMdssByte1Cbcr = 0x4d0a0; |
| constexpr uint32_t kMdssEsc0Cbcr = 0x4d098; |
| constexpr uint32_t kMdssEsc1Cbcr = 0x4d09c; |
| constexpr uint32_t kMdssMdpCbcr = 0x4d088; |
| constexpr uint32_t kMdssPclk0Cbcr = 0x4d084; |
| constexpr uint32_t kMdssPclk1Cbcr = 0x4d0a4; |
| constexpr uint32_t kMdssVsyncCbcr = 0x4d090; |
| constexpr uint32_t kMssCfgAhbCbcr = 0x49000; |
| constexpr uint32_t kMssQ6BimcAxiCbcr = 0x49004; |
| constexpr uint32_t kOxiliAhbCbcr = 0x59028; |
| constexpr uint32_t kOxiliAonCbcr = 0x59044; |
| constexpr uint32_t kOxiliGfx3dCbcr = 0x59020; |
| constexpr uint32_t kOxiliTimerCbcr = 0x59040; |
| constexpr uint32_t kPcnocUsb3AxiCbcr = 0x3f038; |
| constexpr uint32_t kPdm2Cbcr = 0x4400c; |
| constexpr uint32_t kPdmAhbCbcr = 0x44004; |
| constexpr uint32_t kRbcprGfxCbcr = 0x3a004; |
| constexpr uint32_t kSdcc1AhbCbcr = 0x4201c; |
| constexpr uint32_t kSdcc1AppsCbcr = 0x42018; |
| constexpr uint32_t kSdcc1IceCoreCbcr = 0x5d014; |
| constexpr uint32_t kSdcc2AhbCbcr = 0x4301c; |
| constexpr uint32_t kSdcc2AppsCbcr = 0x43018; |
| constexpr uint32_t kUsb30MasterCbcr = 0x3f000; |
| constexpr uint32_t kUsb30MockUtmiCbcr = 0x3f00; |
| constexpr uint32_t kUsb30SleepCbcr = 0x3f004; |
| constexpr uint32_t kUsb3AuxCbcr = 0x3f044; |
| constexpr uint32_t kUsbPhyCfgAhbCbcr = 0x3f080; |
| constexpr uint32_t kVenus0AhbCbcr = 0x4c020; |
| constexpr uint32_t kVenus0AxiCbcr = 0x4c024; |
| constexpr uint32_t kVenus0Core0Vcodec0Cbcr = 0x4c02c; |
| constexpr uint32_t kVenus0Vcodec0Cbcr = 0x4c01c; |
| |
| // Voter Clock Register Offsets. |
| // CBCR Regs. |
| constexpr uint32_t kVfe1TbuCbcr = 0x12090; |
| constexpr uint32_t kBootRomAhbCbcr = 0x1300c; |
| constexpr uint32_t kBlsp2AhbCbcr = 0xb008; |
| constexpr uint32_t kSmmuCfgCbcr = 0x12038; |
| constexpr uint32_t kMdpTbuCbcr = 0x1201c; |
| constexpr uint32_t kApssAhbCbcr = 0x4601c; |
| constexpr uint32_t kCryptoAxiCbcr = 0x16020; |
| constexpr uint32_t kBlsp1AhbCbcr = 0x1008; |
| constexpr uint32_t kQdssDapCbcr = 0x29084; |
| constexpr uint32_t kCppTbuCbcr = 0x12040; |
| constexpr uint32_t kCryptoCbcr = 0x1601c; |
| constexpr uint32_t kVfeTbuCbcr = 0x1203c; |
| constexpr uint32_t kJpegTbuCbcr = 0x12034; |
| constexpr uint32_t kVenusTbuCbcr = 0x12014; |
| constexpr uint32_t kCryptoAhbCbcr = 0x16024; |
| constexpr uint32_t kPrngAhbCbcr = 0x13004; |
| constexpr uint32_t kApssAxiCbcr = 0x46020; |
| constexpr uint32_t kApssTcuAsyncCbcr = 0x12018; |
| // Vote Regs. |
| constexpr uint32_t kApcsClockBranchEnaVote = 0x45004; |
| constexpr uint32_t kApcsSmmuClockBranchEnaVote = 0x4500C; |
| |
| } // namespace msm8x53 |
