| // Copyright 2024 The Fuchsia Authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| |
| library fuchsia.hardware.spmi; |
| |
| const MAX_TARGETS uint32 = 16; |
| const MAX_SUB_TARGETS uint32 = 65536; |
| |
| type SubTargetInfo = table { |
| /// The SPMI base register address. Accesses to this sub-target will be restricted to the range |
| /// [0, `size`) and offset by `address`. Required. |
| 1: address uint16; |
| /// The size of the SPMI register region accessible to this sub-target. The sum of `address` and |
| /// `size` must be less than or equal to 65536. Required. |
| 2: size uint32; |
| /// The name of this sub-target. Optional. |
| 3: name string:MAX_SPMI_NAME_LEN; |
| }; |
| |
| type TargetInfo = table { |
| /// SPMI target ID in [0, `MAX_TARGETS`), unique for this controller. Required. |
| 1: id uint8; |
| /// Sub-target register regions within this target. Optional. |
| 2: sub_targets vector<SubTargetInfo>:MAX_SUB_TARGETS; |
| /// The name of this target. Optional. |
| 3: name string:MAX_SPMI_NAME_LEN; |
| }; |
| |
| /// `ControllerInfo` is passed to SPMI controller drivers via metadata. |
| @serializable |
| type ControllerInfo = table { |
| /// Board-specific controller ID. Optional. |
| 1: id uint32; |
| /// SPMI target devices on this bus. Optional. |
| 2: targets vector<TargetInfo>:MAX_TARGETS; |
| }; |