[zircon][utest] Do not check for the bottom 3 bits of DBGWVR

The core-address-tagging test fails on bringup.arm64-[thin]lto
builders in release mode. This is because an assert fails that checks
the bottom 3 bits of the DBGWVR that we assign. The initial reasoning
for this was because the bottom bits of DBGWVR are reserved according
to the spec. This is slightly incorrect though.

First is it's actually the bottom 2 bits that are reserved, not 3.
Second, these bottom 2 reserved bits are alsi ignored according to the
spec. From `D2.10.4 Watchpoint data address comparisons`:

DBGWVR<n>_EL1[1:0] are RES0 and are ignored.

Fixed: 103228
Change-Id: I0ca9be74f9d96ba01aea7b4770c0a59ded69d29a
Reviewed-on: https://fuchsia-review.googlesource.com/c/fuchsia/+/693834
Reviewed-by: Roland McGrath <mcgrathr@google.com>
Commit-Queue: Leonard Chan <leonardchan@google.com>
diff --git a/zircon/system/utest/core/address-tagging/address-tagging-test.cc b/zircon/system/utest/core/address-tagging/address-tagging-test.cc
index f838fb5..8cdbef4 100644
--- a/zircon/system/utest/core/address-tagging/address-tagging-test.cc
+++ b/zircon/system/utest/core/address-tagging/address-tagging-test.cc
@@ -177,8 +177,6 @@
   // that bits 63:49 be a sign extension of bit 48 (that is, it cannot be tagged)
   // (D13.3.12).
   debug_regs.hw_wps[0].dbgwvr = reinterpret_cast<uintptr_t>(&gVariableToChange);
-  ZX_ASSERT((debug_regs.hw_wps[0].dbgwvr & 0b111) == 0 &&
-            "The lowest 3 bits of DBGWVR must not be set");
   ASSERT_OK(crash_thread.write_state(ZX_THREAD_STATE_DEBUG_REGS, &debug_regs, sizeof(debug_regs)));