zircon/third_party/dev/ethernet/e1000/e1000_osdep.c

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/*$FreeBSD$*/

#include "e1000_api.h"

/*
 * NOTE: the following routines using the e1000
 *  naming style are provided to the shared
 *  code but are OS specific
 */

void e1000_write_pci_cfg(struct e1000_hw* hw, u32 reg, u16* value) {
  pci_write_config16(hw2pci(hw), reg, *value);
}

void e1000_read_pci_cfg(struct e1000_hw* hw, u32 reg, u16* value) {
  pci_read_config16(hw2pci(hw), reg, value);
}

void e1000_pci_set_mwi(struct e1000_hw* hw) {
  pci_write_config16(hw2pci(hw), PCI_CONFIG_COMMAND,
                     (hw->bus.pci_cmd_word | CMD_MEM_WRT_INVALIDATE));
}

void e1000_pci_clear_mwi(struct e1000_hw* hw) {
  pci_write_config16(hw2pci(hw), PCI_CONFIG_COMMAND,
                     (hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE));
}

/*
 * Read the PCI Express capabilities
 */
int32_t e1000_read_pcie_cap_reg(struct e1000_hw* hw, u32 reg, u16* value) {
    pci_protocol_t* pci = hw2pci(hw);
    uint8_t offset;
    zx_status_t st = pci_get_first_capability(pci, PCI_CAPABILITY_ID_PCI_EXPRESS, &offset);
    if (st != ZX_OK) {
        return E1000_ERR_CONFIG;
    }

    pci_read_config16(pci, offset + reg, value);
    return E1000_SUCCESS;
}

/*
 * Write the PCI Express capabilities
 */
int32_t e1000_write_pcie_cap_reg(struct e1000_hw* hw, u32 reg, u16* value) {
    pci_protocol_t* pci = hw2pci(hw);
    uint8_t offset;
    zx_status_t st = pci_get_first_capability(pci, PCI_CAPABILITY_ID_PCI_EXPRESS, &offset);
    if (st != ZX_OK) {
        return E1000_ERR_CONFIG;
    }

    pci_write_config16(pci, offset + reg, *value);
    return E1000_SUCCESS;
}