| {{/* |
| // Copyright 2021 The Fuchsia Authors. All rights reserved. |
| // Use of this source code is governed by a BSD-style license that can be |
| // found in the LICENSE file. |
| */}} |
| |
| {{- define "Filename:WireTypesSource" -}} |
| fidl/{{ .LibraryDots }}/cpp/wire_types.cc |
| {{- end }} |
| |
| |
| {{- define "File:WireTypesSource" -}} |
| {{- UseWire -}} |
| // WARNING: This file is machine generated by fidlgen. |
| |
| {{- /* When the library name only has one component, it is always special. |
| Those libraries should not define business logic types or protocols, and we |
| do not support them in the bindings. */}} |
| {{- if not .SingleComponentLibraryName }} |
| |
| #include <{{ .Library | Filename "WireTypesHeader" }}> |
| |
| {{- range .Consts }} |
| {{ template "Const:WireTypesSource" . }} |
| {{- end }} |
| |
| {{- range .Structs }} |
| {{ template "Struct:WireTypesSource" . }} |
| {{- end }} |
| |
| {{- range .Unions }} |
| {{ template "Union:WireTypesSource" . }} |
| {{- end }} |
| |
| {{- range .Tables }} |
| {{ template "Table:WireTypesSource" . }} |
| {{- end }} |
| |
| {{- end }}{{/* if not SingleComponentLibraryName */}} |
| |
| {{ EndOfFile }} |
| {{ end }} |