src/camera/drivers/hw_accel/gdc/gdc-regs.h

// Copyright 2019 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#ifndef SRC_CAMERA_DRIVERS_HW_ACCEL_GDC_GDC_REGS_H_
#define SRC_CAMERA_DRIVERS_HW_ACCEL_GDC_GDC_REGS_H_

#include <hwreg/bitfields.h>
#include <zircon/types.h>

namespace gdc {

// HHI_APICALGDC_CNTL
class GDC_CLK_CNTL : public hwreg::RegisterBase<GDC_CLK_CNTL, uint32_t> {
 public:
  DEF_FIELD(27, 25, axi_clk_div);
  DEF_BIT(24, axi_clk_en);
  DEF_FIELD(22, 16, axi_clk_sel);
  DEF_FIELD(11, 9, core_clk_div);
  DEF_BIT(8, core_clk_en);
  DEF_FIELD(6, 0, core_clk_sel);
  static auto Get() { return hwreg::RegisterAddr<GDC_CLK_CNTL>(0x16C); }
  GDC_CLK_CNTL& reset_axi() {
    set_axi_clk_div(0);
    set_axi_clk_en(0);
    set_axi_clk_sel(0);
    return *this;
  }
  GDC_CLK_CNTL& reset_core() {
    set_core_clk_div(0);
    set_core_clk_en(0);
    set_core_clk_sel(0);
    return *this;
  }
};

// HHI_MEM_PD_REG0
class GDC_MEM_POWER_DOMAIN
    : public hwreg::RegisterBase<GDC_MEM_POWER_DOMAIN, uint32_t> {
 public:
  DEF_FIELD(19, 18, gdc_pd);
  static auto Get() { return hwreg::RegisterAddr<GDC_MEM_POWER_DOMAIN>(0x100); }
};

// GDC registers
class ID : public hwreg::RegisterBase<ID, uint32_t> {
 public:
  DEF_FIELD(31, 0, id);
  static auto Get() { return hwreg::RegisterAddr<ID>(0x0); }
};

}  // namespace gdc

#endif  // SRC_CAMERA_DRIVERS_HW_ACCEL_GDC_GDC_REGS_H_