| # Copyright 2019 The Fuchsia Authors. All rights reserved. |
| # Use of this source code is governed by a BSD-style license that can be |
| # found in the LICENSE file. |
| |
| import("../../../../../gn/build_rules.gni") |
| import("../../targets/hotsort_target.gni") |
| |
| # |
| # hotsort_vk_bench: benchmark HotSort |
| # |
| |
| graphics_compute_vulkan_executable("hotsort_vk_bench") { |
| sources = [ |
| "main.c", |
| "sort.cpp", |
| ] |
| deps = [ |
| ":hs_amd_gcn3_u32", |
| ":hs_amd_gcn3_u64", |
| ":hs_intel_gen8_u32", |
| ":hs_intel_gen8_u64", |
| ":hs_nvidia_sm35_u32", |
| ":hs_nvidia_sm35_u64", |
| "${graphics_compute_dir}/common", |
| "${graphics_compute_dir}/common/vk", |
| "${graphics_compute_dir}/hotsort/platforms/vk", |
| ] |
| } |
| |
| # |
| # configuration |
| # |
| # $HS_GEN -v -a "glsl" -D HS_AMD_GCN3 -t 1 -w 64 -r 16 -s 32768 -S 32768 -b 16 -m 1 -M 1 -f 1 -F 1 -c 1 -C 1 -z |
| # |
| |
| hotsort_target("hs_amd_gcn3_u32") { |
| vendor = "amd" |
| type_dwords = 1 |
| warp_lanes = 64 |
| thread_regs = 16 |
| smem_bs = 32768 |
| smem_bc = 32768 |
| warps_per_group = 16 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_lo = 1 |
| merge_flip_hi = 1 |
| merge_half_lo = 1 |
| merge_half_hi = 1 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |
| |
| # |
| # configuration |
| # |
| # $HS_GEN -v -a "glsl" -D HS_AMD_GCN3 -t 2 -w 64 -r 8 -s 32768 -S 32768 -b 16 -m 1 -M 1 -f 1 -F 1 -c 1 -C 1 -z |
| # |
| |
| hotsort_target("hs_amd_gcn3_u64") { |
| vendor = "amd" |
| type_dwords = 2 |
| warp_lanes = 64 |
| thread_regs = 8 |
| smem_bs = 32768 |
| smem_bc = 32768 |
| warps_per_group = 16 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_lo = 1 |
| merge_flip_hi = 1 |
| merge_half_lo = 1 |
| merge_half_hi = 1 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |
| |
| # |
| # configuration |
| # |
| # $HS_GEN -v -a "glsl" -D HS_INTEL_GEN8 -t 1 -w 16 -r 8 -s 21504 -S 65536 -b 16 -B 48 -m 1 -M 1 -f 0 -F 0 -c 0 -C 0 -z |
| # |
| |
| hotsort_target("hs_intel_gen8_u32") { |
| vendor = "intel" |
| type_dwords = 1 |
| warp_lanes = 8 |
| thread_regs = 8 |
| smem_bs = 21504 |
| smem_bc = 65536 |
| warps_per_group = 16 |
| warps_max = 48 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_lo = 0 |
| merge_flip_hi = 0 |
| merge_half_lo = 0 |
| merge_half_hi = 0 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |
| |
| # |
| # configuration |
| # |
| # $HS_GEN -v -a "glsl" -D HS_INTEL_GEN8 -t 2 -w 8 -r 16 -s 21504 -S 65536 -b 16 -B 48 -m 1 -M 1 -f 1 -F 1 -c 1 -C 1 -z |
| # |
| |
| hotsort_target("hs_intel_gen8_u64") { |
| vendor = "intel" |
| type_dwords = 2 |
| warp_lanes = 8 |
| thread_regs = 16 |
| smem_bs = 21504 |
| smem_bc = 65536 |
| warps_per_group = 16 |
| warps_max = 48 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_lo = 1 |
| merge_flip_hi = 1 |
| merge_half_lo = 1 |
| merge_half_hi = 1 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |
| |
| # |
| # configuration |
| # |
| # OLD: $HS_GEN -v -a "glsl" -D HS_NVIDIA_SM35 -t 1 -w 32 -r 32 -s 49152 -S 65536 -b 32 -m 1 -M 1 -f 1 -F 1 -c 1 -C 1 -z |
| # NEW: $HS_GEN -v -a "glsl" -D HS_NVIDIA_SM35 -t 1 -w 32 -r 16 -s 32768 -S 32768 -b 16 -m 1 -M 1 -p 1 -P 1 -f 0 -F 0 -c 0 -C 0 -z |
| # |
| |
| hotsort_target("hs_nvidia_sm35_u32") { |
| vendor = "nvidia" |
| type_dwords = 1 |
| warp_lanes = 32 |
| thread_regs = 16 |
| smem_bs = 32768 |
| smem_bc = 32768 |
| warps_per_group = 16 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_warps = 1 |
| merge_half_warps = 1 |
| merge_flip_lo = 0 |
| merge_flip_hi = 0 |
| merge_half_lo = 0 |
| merge_half_hi = 0 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |
| |
| # |
| # configuration |
| # |
| # OLD: $HS_GEN -v -a "glsl" -D HS_NVIDIA_SM35 -t 2 -w 32 -r 32 -s 49152 -S 65536 -b 16 -m 1 -M 1 -f 1 -F 1 -c 1 -C 1 -z |
| # NEW: $HS_GEN -v -a "glsl" -D HS_NVIDIA_SM35 -t 2 -w 32 -r 8 -s 32768 -S 32768 -b 16 -m 1 -M 1 -p 1 -P 1 -f 0 -F 0 -c 0 -C 0 -z |
| # |
| |
| hotsort_target("hs_nvidia_sm35_u64") { |
| vendor = "nvidia" |
| type_dwords = 2 |
| warp_lanes = 32 |
| thread_regs = 8 |
| smem_bs = 32768 |
| smem_bc = 32768 |
| warps_per_group = 16 |
| warps_min = 1 |
| warps_mod = 1 |
| merge_flip_warps = 1 |
| merge_half_warps = 1 |
| merge_flip_lo = 0 |
| merge_flip_hi = 0 |
| merge_half_lo = 0 |
| merge_half_hi = 0 |
| glsl_bindings = "0,1,0,0" |
| autotune = true |
| } |