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// Copyright 2018 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
library ddk.protocol.sdhci;
using hw.sdhci;
using zx;
enum SdhciQuirk : uint64 {
/// This is a BCM28xx specific quirk. The bottom 8 bits of the 136
/// bit response are normally filled by 7 CRC bits and 1 reserved bit.
/// The BCM controller checks the CRC for us and strips it off in the
/// process.
/// The higher level stack expects 136B responses to be packed in a
/// certain way so we shift all the fields back to their proper offsets.
STRIP_RESPONSE_CRC = 0x1;
/// BCM28xx quirk: The BCM28xx appears to use its internal DMA engine to
/// perform transfers against the SD card. Normally we would use SDMA or
/// ADMA (if the part supported it). Since this part doesn't appear to
/// support either, we just use PIO.
NO_DMA = 0x2;
/// The bottom 8 bits of the 136 bit response are normally filled by 7 CRC bits
/// and 1 reserved bit. Some controllers strip off the CRC.
/// The higher level stack expects 136B responses to be packed in a certain way
/// so we shift all the fields back to their proper offsets.
STRIP_RESPONSE_CRC_PRESERVE_ORDER = 0x4;
};
[Layout="ddk-protocol"]
interface Sdhci {
// TODO: should be replaced with a generic busdev mechanism
1: GetInterrupt() -> (zx.status s, handle<interrupt> irq);
2: GetMmio() -> (zx.status s, handle<vmo> mmio);
/// Gets a handle to the bus transaction initiator for the device. The caller
/// receives ownership of the handle.
3: GetBti(uint32 index) -> (zx.status s, handle<bti> bti);
4: GetBaseClock() -> (uint32 clock);
/// returns device quirks
5: GetQuirks() -> (uint64 clock);
/// platform specific HW reset
6: HwReset() -> ();
};