WIp trying to figure out a72
Change-Id: Ib590b75c768d72f85254a4b2c8645a26bd525a03
diff --git a/kernel/arch/arm64/arch.cpp b/kernel/arch/arm64/arch.cpp
index 4bb96aa..299780d 100644
--- a/kernel/arch/arm64/arch.cpp
+++ b/kernel/arch/arm64/arch.cpp
@@ -133,6 +133,15 @@
platform_init_mmu_mappings();
}
+static void arch_init_percpu() {
+ auto cpu = arch_curr_cpu_num();
+
+ TRACEF("cpu %u: SCTLR %#" PRIx64 "\n", cpu, ARM64_READ_SYSREG(SCTLR_EL1));
+ TRACEF("cpu %u: ACTLR %#" PRIx64 "\n", cpu, ARM64_READ_SYSREG(ACTLR_EL1));
+ TRACEF("cpu %u: CPUECTLR %#" PRIx64 "\n", cpu, ARM64_READ_SYSREG(S3_1_c15_c2_1));
+ TRACEF("cpu %u: CPUACTLR %#" PRIx64 "\n", cpu, ARM64_READ_SYSREG(S3_1_c15_c2_0));
+}
+
void arch_init(void) TA_NO_THREAD_SAFETY_ANALYSIS {
arch_mp_init_percpu();
@@ -140,6 +149,8 @@
arm64_feature_debug(true);
+ arch_init_percpu();
+
uint32_t max_cpus = arch_max_num_cpus();
uint32_t cmdline_max_cpus = cmdline_get_uint32("kernel.smp.maxcpus", max_cpus);
if (cmdline_max_cpus > max_cpus || cmdline_max_cpus <= 0) {
@@ -201,6 +212,8 @@
arch_mp_init_percpu();
+ arch_init_percpu();
+
arm64_feature_debug(false);
lk_secondary_cpu_entry();
diff --git a/kernel/arch/arm64/exceptions_c.cpp b/kernel/arch/arm64/exceptions_c.cpp
index d0f066d..e212df0 100644
--- a/kernel/arch/arm64/exceptions_c.cpp
+++ b/kernel/arch/arm64/exceptions_c.cpp
@@ -86,6 +86,7 @@
uint32_t iss = BITS(esr, 24, 0);
/* fatal exception, die here */
+ printf("CPU %u\n", arch_curr_cpu_num());
printf("ESR 0x%x: ec 0x%x, il 0x%x, iss 0x%x\n", esr, ec, il, iss);
dump_iframe(iframe);
diff --git a/kernel/arch/arm64/mmu.cpp b/kernel/arch/arm64/mmu.cpp
index 27b842f..2557ede 100644
--- a/kernel/arch/arm64/mmu.cpp
+++ b/kernel/arch/arm64/mmu.cpp
@@ -447,6 +447,7 @@
DEBUG_ASSERT(status == ZX_OK);
} else if (asid_ == MMU_ARM64_GLOBAL_ASID) {
// flush this address on all ASIDs
+ LTRACEF("kernel flush, vaddr %#" PRIxPTR "\n", vaddr);
if (terminal) {
ARM64_TLBI(vaale1is, vaddr >> 12);
} else {
@@ -454,6 +455,7 @@
}
} else {
// flush this address for the specific asid
+ LTRACEF("asid flush, asid %#hx, vaddr %#" PRIxPTR "\n", asid_, vaddr);
if (terminal) {
ARM64_TLBI(vale1is, vaddr >> 12 | (vaddr_t)asid_ << 48);
} else {
@@ -499,7 +501,7 @@
page_size_shift, next_page_table);
if (chunk_size == block_size ||
page_table_is_clear(next_page_table, page_size_shift)) {
- LTRACEF("pte %p[0x%lx] = 0 (was page table)\n", page_table, index);
+ TRACEF("pte %p[0x%lx] = 0 (was page table)\n", page_table, index);
page_table[index] = MMU_PTE_DESCRIPTOR_INVALID;
// ensure that the update is observable from hardware page table walkers
@@ -847,7 +849,7 @@
zx_status_t ArmArchVmAspace::Map(vaddr_t vaddr, paddr_t* phys, size_t count, uint mmu_flags,
size_t* mapped) {
canary_.Assert();
- LTRACEF("vaddr %#" PRIxPTR " count %zu flags %#x\n",
+ TRACEF("vaddr %#" PRIxPTR " count %zu flags %#x\n",
vaddr, count, mmu_flags);
DEBUG_ASSERT(tt_virt_);
@@ -918,7 +920,7 @@
zx_status_t ArmArchVmAspace::Unmap(vaddr_t vaddr, size_t count, size_t* unmapped) {
canary_.Assert();
- LTRACEF("vaddr %#" PRIxPTR " count %zu\n", vaddr, count);
+ TRACEF("vaddr %#" PRIxPTR " count %zu\n", vaddr, count);
DEBUG_ASSERT(tt_virt_);
diff --git a/kernel/include/kernel/thread.h b/kernel/include/kernel/thread.h
index 92488c4..c71bcc7 100644
--- a/kernel/include/kernel/thread.h
+++ b/kernel/include/kernel/thread.h
@@ -71,7 +71,7 @@
// N.B. This must match ZX_MAX_NAME_LEN.
#define THREAD_NAME_LENGTH 32
-#define THREAD_LINEBUFFER_LENGTH 128
+#define THREAD_LINEBUFFER_LENGTH 192
// Number of kernel tls slots.
#define THREAD_MAX_TLS_ENTRY 2
diff --git a/kernel/object/thread_dispatcher.cpp b/kernel/object/thread_dispatcher.cpp
index 2aef545..e09c9de 100644
--- a/kernel/object/thread_dispatcher.cpp
+++ b/kernel/object/thread_dispatcher.cpp
@@ -88,11 +88,14 @@
}
// free the kernel stack
+#if 1
+ TRACEF("destroying mapping at %#" PRIxPTR "\n", kstack_mapping_->base());
kstack_mapping_.reset();
if (kstack_vmar_) {
kstack_vmar_->Destroy();
kstack_vmar_.reset();
}
+#endif
#if __has_feature(safe_stack)
unsafe_kstack_mapping_.reset();
if (unsafe_kstack_vmar_) {
@@ -157,7 +160,7 @@
if (status != ZX_OK)
return status;
- LTRACEF("%s stack mapping at %#" PRIxPTR "\n",
+ TRACEF("%s stack mapping at %#" PRIxPTR "\n",
unsafe ? "unsafe" : "safe", kstack_mapping->base());
// fault in all the pages so we dont demand fault in the stack
diff --git a/kernel/top/main.cpp b/kernel/top/main.cpp
index add9235..4809d7c 100644
--- a/kernel/top/main.cpp
+++ b/kernel/top/main.cpp
@@ -15,6 +15,7 @@
#include <debug.h>
#include <kernel/init.h>
#include <kernel/mutex.h>
+#include <kernel/percpu.h>
#include <kernel/thread.h>
#include <lib/heap.h>
#include <lk/init.h>
@@ -125,6 +126,8 @@
// secondary cpu initialize from threading level up. 0 to threading was handled in arch
lk_init_level(LK_INIT_FLAG_SECONDARY_CPUS, LK_INIT_LEVEL_THREADING, LK_INIT_LEVEL_LAST);
+ printf("CPU %u: percpu @ %p\n", cpu, &percpu[cpu]);
+
dprintf(SPEW, "entering scheduler on cpu %u\n", cpu);
thread_secondary_cpu_entry();
}
