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// Copyright 2018 The Fuchsia Authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include <soc/aml-s905d2/s905d2-gpio.h>
static aml_gpio_block_t s905d2_gpio_blocks[] = {
// GPIO Z Block
{
.start_pin = (S905D2_GPIOZ_START + 0),
.pin_block = S905D2_GPIOZ_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_6,
.oen_offset = S905D2_PREG_PAD_GPIO4_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO4_I,
.output_offset = S905D2_PREG_PAD_GPIO4_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOZ_START + 8),
.pin_block = S905D2_GPIOZ_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_7,
.oen_offset = S905D2_PREG_PAD_GPIO4_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO4_I,
.output_offset = S905D2_PREG_PAD_GPIO4_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO A Block
{
.start_pin = (S905D2_GPIOA_START + 0),
.pin_block = S905D2_GPIOA_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_D,
.oen_offset = S905D2_PREG_PAD_GPIO5_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO5_I,
.output_offset = S905D2_PREG_PAD_GPIO5_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOA_START + 8),
.pin_block = S905D2_GPIOA_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_E,
.oen_offset = S905D2_PREG_PAD_GPIO5_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO5_I,
.output_offset = S905D2_PREG_PAD_GPIO5_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO BOOT Block
{
.start_pin = (S905D2_GPIOBOOT_START + 0),
.pin_block = S905D2_GPIOBOOT_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_0,
.oen_offset = S905D2_PREG_PAD_GPIO0_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO0_I,
.output_offset = S905D2_PREG_PAD_GPIO0_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOBOOT_START + 8),
.pin_block = S905D2_GPIOBOOT_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_1,
.oen_offset = S905D2_PREG_PAD_GPIO0_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO0_I,
.output_offset = S905D2_PREG_PAD_GPIO0_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO C Block
{
.start_pin = (S905D2_GPIOC_START + 0),
.pin_block = S905D2_GPIOC_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_9,
.oen_offset = S905D2_PREG_PAD_GPIO1_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO1_I,
.output_offset = S905D2_PREG_PAD_GPIO1_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO X Block
{
.start_pin = (S905D2_GPIOX_START + 0),
.pin_block = S905D2_GPIOX_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_3,
.oen_offset = S905D2_PREG_PAD_GPIO2_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO2_I,
.output_offset = S905D2_PREG_PAD_GPIO2_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOX_START + 8),
.pin_block = S905D2_GPIOX_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_4,
.oen_offset = S905D2_PREG_PAD_GPIO2_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO2_I,
.output_offset = S905D2_PREG_PAD_GPIO2_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOX_START + 16),
.pin_block = S905D2_GPIOX_START,
.pin_count = 4,
.mux_offset = S905D2_PERIPHS_PIN_MUX_5,
.oen_offset = S905D2_PREG_PAD_GPIO2_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO2_I,
.output_offset = S905D2_PREG_PAD_GPIO2_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO H Block
{
.start_pin = (S905D2_GPIOH_START + 0),
.pin_block = S905D2_GPIOH_START,
.pin_count = 8,
.mux_offset = S905D2_PERIPHS_PIN_MUX_B,
.oen_offset = S905D2_PREG_PAD_GPIO3_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO3_I,
.output_offset = S905D2_PREG_PAD_GPIO3_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOH_START + 8),
.pin_block = S905D2_GPIOH_START,
.pin_count = 1,
.mux_offset = S905D2_PERIPHS_PIN_MUX_C,
.oen_offset = S905D2_PREG_PAD_GPIO3_EN_N,
.input_offset = S905D2_PREG_PAD_GPIO3_I,
.output_offset = S905D2_PREG_PAD_GPIO3_O,
.output_shift = 0,
.mmio_index = 0,
.lock = MTX_INIT,
},
// GPIO AO Block
{
.start_pin = (S905D2_GPIOAO_START + 0),
.pin_block = S905D2_GPIOAO_START,
.pin_count = 8,
.mux_offset = S905D2_AO_RTI_PINMUX_REG0,
.oen_offset = S905D2_AO_GPIO_O_EN_N,
.input_offset = S905D2_AO_GPIO_I,
.output_offset = S905D2_AO_GPIO_O_EN_N,
.output_shift = 16,
.mmio_index = 0,
.lock = MTX_INIT,
},
{
.start_pin = (S905D2_GPIOAO_START + 8),
.pin_block = S905D2_GPIOAO_START,
.pin_count = 4 + S905D2_GPIOE_COUNT, // GPIOE seems to be part of GPIO AO
.mux_offset = S905D2_AO_RTI_PINMUX_REG1,
.oen_offset = S905D2_AO_GPIO_O_EN_N,
.input_offset = S905D2_AO_GPIO_I,
.output_offset = S905D2_AO_GPIO_O_EN_N,
.output_shift = 16,
.mmio_index = 0,
.lock = MTX_INIT,
},
};