commit e7571cfeb0a52cfb0f65ecf3285f84812dea08e3
author Christopher Anderson <cja@google.com> Tue Jun 12 10:33:39 2018 -0700
committer Christopher Anderson <cja@google.com> Tue Jun 12 11:03:11 2018 -0700
tree 536b31eae6dd0ca63362a20f620e7730ba6e205b
parent 3ab5095aa81bea53cc1647fea9e8b6bc823b340d

[virtio] Improve backend logging for MMIO

- Log the bar / offset values of virtio confiig structures during
  initialization under TRACE
- Move ring kick debugging to SPEW

Change-Id: Id7f95686c300c659189eac444dbcc15d20d7e599

system/dev/bus/virtio/backends/pci_modern.cpp

diff --git a/system/dev/bus/virtio/backends/pci_modern.cpp b/system/dev/bus/virtio/backends/pci_modern.cpp
index b1bd611..b17215d 100644
--- a/system/dev/bus/virtio/backends/pci_modern.cpp
+++ b/system/dev/bus/virtio/backends/pci_modern.cpp
@@ -166,10 +166,12 @@
     // Store the base as a uintptr_t due to the amount of math done on it later
     bar_[bar].mmio_base = reinterpret_cast<uintptr_t>(base);
     bar_[bar].mmio_handle.reset(handle);
+    zxlogf(TRACE, "%s: bar %u mapped to %#" PRIxPTR "\n", tag(), bar, bar_[bar].mmio_base);
     return ZX_OK;
 }
 
 void PciModernBackend::CommonCfgCallbackLocked(const virtio_pci_cap_t& cap) {
+    zxlogf(TRACE, "%s: common cfg found in bar %u offset %#x\n", tag(), cap.bar, cap.offset);
     if (MapBar(cap.bar) != ZX_OK) {
         return;
     }
@@ -183,6 +185,7 @@
 }
 
 void PciModernBackend::NotifyCfgCallbackLocked(const virtio_pci_cap_t& cap) {
+    zxlogf(TRACE, "%s: notify cfg found in bar %u offset %#x\n", tag(), cap.bar, cap.offset);
     if (MapBar(cap.bar) != ZX_OK) {
         return;
     }
@@ -191,6 +194,7 @@
 }
 
 void PciModernBackend::IsrCfgCallbackLocked(const virtio_pci_cap_t& cap) {
+    zxlogf(TRACE, "%s: isr cfg found in bar %u offset %#x\n", tag(), cap.bar, cap.offset);
     if (MapBar(cap.bar) != ZX_OK) {
         return;
     }
@@ -200,6 +204,7 @@
 }
 
 void PciModernBackend::DeviceCfgCallbackLocked(const virtio_pci_cap_t& cap) {
+    zxlogf(TRACE, "%s: device cfg found in bar %u offset %#x\n", tag(), cap.bar, cap.offset);
     if (MapBar(cap.bar) != ZX_OK) {
         return;
     }
@@ -265,7 +270,7 @@
     MmioWrite(&common_cfg_->device_feature_select, select);
     MmioRead(&common_cfg_->device_feature, &val);
     bool is_set = (val & (1u << bit)) != 0;
-    zxlogf(SPEW, "%s: read feature bit %u = %u\n", tag(), feature, is_set);
+    zxlogf(TRACE, "%s: read feature bit %u = %u\n", tag(), feature, is_set);
     return is_set;
 }
 
@@ -278,7 +283,7 @@
     MmioWrite(&common_cfg_->driver_feature_select, select);
     MmioRead(&common_cfg_->driver_feature, &val);
     MmioWrite(&common_cfg_->driver_feature, val | (1u << bit));
-    zxlogf(SPEW, "%s: feature bit %u now set\n", tag(), feature);
+    zxlogf(TRACE, "%s: feature bit %u now set\n", tag(), feature);
 }
 
 zx_status_t PciModernBackend::ConfirmFeatures() {