commit 3b6db2332c8562afaf5f6ef9c70e3f0cdca63aef
author Brijen Raval <braval@google.com> Fri Jun 15 10:09:29 2018 -0700
committer CQ bot account: commit-bot@chromium.org <commit-bot@chromium.org> Fri Jun 15 19:27:28 2018 +0000
tree 1461ab0173bc7306e4c18ef5526707c3489662bf
parent 219c5763d0a0a90a90d13ebd0d57d289deddec0c

[thermal][amlogic] Do not change CPU/GPU freq is already set to same setting

Change-Id: Ic6fe75ca83674704301a227337c5c3950c7acf0d

system/dev/gpu/aml-gpu/aml-gpu.c

diff --git a/system/dev/gpu/aml-gpu/aml-gpu.c b/system/dev/gpu/aml-gpu/aml-gpu.c
index 59c942f..246435d 100644
--- a/system/dev/gpu/aml-gpu/aml-gpu.c
+++ b/system/dev/gpu/aml-gpu/aml-gpu.c
@@ -23,7 +23,14 @@
 #include "s912-gpu.h"
 #include "s905d2-gpu.h"
 
+static int32_t current_clk_source;
+
 static void aml_gpu_set_clk_freq_source(aml_gpu_t* gpu, int32_t clk_source) {
+
+    if (current_clk_source == clk_source) {
+        return;
+    }
+
     aml_gpu_block_t* gpu_block = gpu->gpu_block;
     uint32_t current_clk_cntl = READ32_HIU_REG(gpu_block->hhi_clock_cntl_offset);
     uint32_t enabled_mux = current_clk_cntl & (1 << FINAL_MUX_BIT_SHIFT);
@@ -45,6 +52,8 @@
 
     // Select the unused input mux
     WRITE32_HIU_REG(gpu_block->hhi_clock_cntl_offset, current_clk_cntl);
+
+    current_clk_source = clk_source;
 }
 
 static void aml_gpu_init(aml_gpu_t* gpu) {

system/dev/thermal/aml-thermal/aml-thermal.c

diff --git a/system/dev/thermal/aml-thermal/aml-thermal.c b/system/dev/thermal/aml-thermal/aml-thermal.c
index fc1589e..6e2ed40 100644
--- a/system/dev/thermal/aml-thermal/aml-thermal.c
+++ b/system/dev/thermal/aml-thermal/aml-thermal.c
@@ -130,6 +130,17 @@
 
 static zx_status_t aml_thermal_set_dvfs_opp(aml_thermal_t* dev,
                                      dvfs_info_t* info) {
+    uint16_t op_idx;
+    zx_status_t status = scpi_get_dvfs_idx(&dev->scpi, info->power_domain, &op_idx);
+    if (status != ZX_OK) {
+        THERMAL_ERROR("Unable to get current dvfs info");
+        return status;
+    }
+
+    if (op_idx == info->op_idx) {
+        return ZX_OK;
+    }
+
     return scpi_set_dvfs_idx(&dev->scpi, info->power_domain, info->op_idx);
 }