`aarch64`: check for `trn1` and `trn2`
diff --git a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
index 8e36991..32531c7 100644
--- a/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
+++ b/library/stdarch/crates/core_arch/src/arm_shared/neon/generated.rs
@@ -72994,7 +72994,11 @@ pub fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
@@ -73012,7 +73016,11 @@ pub fn vtrn_f16(a: float16x4_t, b: float16x4_t) -> float16x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[target_feature(enable = "neon,fp16")]
#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
@@ -73118,7 +73126,11 @@ pub fn vtrn_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73143,7 +73155,11 @@ pub fn vtrnq_f32(a: float32x4_t, b: float32x4_t) -> float32x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73168,7 +73184,11 @@ pub fn vtrn_s8(a: int8x8_t, b: int8x8_t) -> int8x8x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73201,7 +73221,11 @@ pub fn vtrnq_s8(a: int8x16_t, b: int8x16_t) -> int8x16x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73226,7 +73250,11 @@ pub fn vtrn_s16(a: int16x4_t, b: int16x4_t) -> int16x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73251,7 +73279,11 @@ pub fn vtrnq_s16(a: int16x8_t, b: int16x8_t) -> int16x8x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73276,7 +73308,11 @@ pub fn vtrnq_s32(a: int32x4_t, b: int32x4_t) -> int32x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73301,7 +73337,11 @@ pub fn vtrn_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73334,7 +73374,11 @@ pub fn vtrnq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73359,7 +73403,11 @@ pub fn vtrn_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73384,7 +73432,11 @@ pub fn vtrnq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73409,7 +73461,11 @@ pub fn vtrnq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73434,7 +73490,11 @@ pub fn vtrn_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73467,7 +73527,11 @@ pub fn vtrnq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
@@ -73492,7 +73556,11 @@ pub fn vtrn_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4x2_t {
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtrn))]
#[cfg_attr(
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
- assert_instr(trn)
+ assert_instr(trn1)
+)]
+#[cfg_attr(
+ all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
+ assert_instr(trn2)
)]
#[cfg_attr(
not(target_arch = "arm"),
diff --git a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
index 3bf8bc1..c96c6e2 100644
--- a/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
+++ b/library/stdarch/crates/stdarch-gen-arm/spec/neon/arm_shared.spec.yml
@@ -9532,7 +9532,8 @@
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]]
- - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn]]}]]
+ - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn1]]}]]
+ - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn2]]}]]
- *neon-not-arm-stable
- *neon-cfg-arm-unstable
safety: safe
@@ -9573,7 +9574,8 @@
attr:
- *neon-v7
- FnCall: [cfg_attr, [*test-is-arm, {FnCall: [assert_instr, [vtrn]]}]]
- - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn]]}]]
+ - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn1]]}]]
+ - FnCall: [cfg_attr, [*neon-target-aarch64-arm64ec, {FnCall: [assert_instr, [trn2]]}]]
- *neon-fp16
- *neon-unstable-f16
safety: safe
