Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200330' into staging
Improve PIE and other linkage
Fix for decodetree vs Python3 floor division operator
Fix i386 INDEX_op_dup2_vec expansion
Fix loongson multimedia condition instructions
# gpg: Signature made Tue 31 Mar 2020 04:50:15 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20200330:
decodetree: Use Python3 floor division operator
tcg/i386: Fix INDEX_op_dup2_vec
target/mips: Fix loongson multimedia condition instructions
configure: Support -static-pie if requested
configure: Override the os default with --disable-pie
configure: Unnest detection of -z,relro and -z,now
configure: Always detect -no-pie toolchain support
configure: Do not force pie=no for non-x86
tcg: Remove softmmu code_gen_buffer fixed address
configure: Drop adjustment of textseg
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/Makefile b/Makefile
index fc2808f..84ef881 100644
--- a/Makefile
+++ b/Makefile
@@ -795,7 +795,7 @@
endef
distclean: clean
- rm -f config-host.mak config-host.h* config-host.ld $(DOCS)
+ rm -f config-host.mak config-host.h* $(DOCS)
rm -f tests/tcg/config-*.mak
rm -f config-all-devices.mak config-all-disas.mak config.status
rm -f $(SUBDIR_DEVICES_MAK)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 7891415..9924e66 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1043,47 +1043,20 @@
{
int prot = PROT_WRITE | PROT_READ | PROT_EXEC;
int flags = MAP_PRIVATE | MAP_ANONYMOUS;
- uintptr_t start = 0;
size_t size = tcg_ctx->code_gen_buffer_size;
void *buf;
- /* Constrain the position of the buffer based on the host cpu.
- Note that these addresses are chosen in concert with the
- addresses assigned in the relevant linker script file. */
-# if defined(__PIE__) || defined(__PIC__)
- /* Don't bother setting a preferred location if we're building
- a position-independent executable. We're more likely to get
- an address near the main executable if we let the kernel
- choose the address. */
-# elif defined(__x86_64__) && defined(MAP_32BIT)
- /* Force the memory down into low memory with the executable.
- Leave the choice of exact location with the kernel. */
- flags |= MAP_32BIT;
- /* Cannot expect to map more than 800MB in low memory. */
- if (size > 800u * 1024 * 1024) {
- tcg_ctx->code_gen_buffer_size = size = 800u * 1024 * 1024;
- }
-# elif defined(__sparc__)
- start = 0x40000000ul;
-# elif defined(__s390x__)
- start = 0x90000000ul;
-# elif defined(__mips__)
-# if _MIPS_SIM == _ABI64
- start = 0x128000000ul;
-# else
- start = 0x08000000ul;
-# endif
-# endif
-
- buf = mmap((void *)start, size, prot, flags, -1, 0);
+ buf = mmap(NULL, size, prot, flags, -1, 0);
if (buf == MAP_FAILED) {
return NULL;
}
#ifdef __mips__
if (cross_256mb(buf, size)) {
- /* Try again, with the original still mapped, to avoid re-acquiring
- that 256mb crossing. This time don't specify an address. */
+ /*
+ * Try again, with the original still mapped, to avoid re-acquiring
+ * the same 256mb crossing.
+ */
size_t size2;
void *buf2 = mmap(NULL, size, prot, flags, -1, 0);
switch ((int)(buf2 != MAP_FAILED)) {
diff --git a/configure b/configure
index e225a1e..22870f3 100755
--- a/configure
+++ b/configure
@@ -1067,7 +1067,6 @@
;;
--static)
static="yes"
- QEMU_LDFLAGS="-static $QEMU_LDFLAGS"
QEMU_PKG_CONFIG_FLAGS="--static $QEMU_PKG_CONFIG_FLAGS"
;;
--mandir=*) mandir="$optarg"
@@ -2089,11 +2088,6 @@
if test "$modules" = "yes" ; then
error_exit "static and modules are mutually incompatible"
fi
- if test "$pie" = "yes" ; then
- error_exit "static and pie are mutually incompatible"
- else
- pie="no"
- fi
fi
# Unconditional check for compiler __thread support
@@ -2107,51 +2101,52 @@
"Thread-Local Storage (TLS). Please upgrade to a version that does."
fi
-if test "$pie" = ""; then
- case "$cpu-$targetos" in
- i386-Linux|x86_64-Linux|x32-Linux|i386-OpenBSD|x86_64-OpenBSD)
- ;;
- *)
- pie="no"
- ;;
- esac
-fi
-
-if test "$pie" != "no" ; then
- cat > $TMPC << EOF
+cat > $TMPC << EOF
#ifdef __linux__
# define THREAD __thread
#else
# define THREAD
#endif
-
static THREAD int tls_var;
-
int main(void) { return tls_var; }
-
EOF
- # check we support --no-pie first...
- if compile_prog "-Werror -fno-pie" "-no-pie"; then
- CFLAGS_NOPIE="-fno-pie"
- LDFLAGS_NOPIE="-nopie"
- fi
- if compile_prog "-fPIE -DPIE" "-pie"; then
+# Check we support --no-pie first; we will need this for building ROMs.
+if compile_prog "-Werror -fno-pie" "-no-pie"; then
+ CFLAGS_NOPIE="-fno-pie"
+ LDFLAGS_NOPIE="-no-pie"
+fi
+
+if test "$static" = "yes"; then
+ if test "$pie" != "no" && compile_prog "-fPIE -DPIE" "-static-pie"; then
QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS"
- QEMU_LDFLAGS="-pie $QEMU_LDFLAGS"
+ QEMU_LDFLAGS="-static-pie $QEMU_LDFLAGS"
pie="yes"
- if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then
- QEMU_LDFLAGS="-Wl,-z,relro -Wl,-z,now $QEMU_LDFLAGS"
- fi
+ elif test "$pie" = "yes"; then
+ error_exit "-static-pie not available due to missing toolchain support"
else
- if test "$pie" = "yes"; then
- error_exit "PIE not available due to missing toolchain support"
- else
- echo "Disabling PIE due to missing toolchain support"
- pie="no"
- fi
+ QEMU_LDFLAGS="-static $QEMU_LDFLAGS"
+ pie="no"
fi
+elif test "$pie" = "no"; then
+ QEMU_CFLAGS="$CFLAGS_NOPIE $QEMU_CFLAGS"
+ QEMU_LDFLAGS="$LDFLAGS_NOPIE $QEMU_LDFLAGS"
+elif compile_prog "-fPIE -DPIE" "-pie"; then
+ QEMU_CFLAGS="-fPIE -DPIE $QEMU_CFLAGS"
+ QEMU_LDFLAGS="-pie $QEMU_LDFLAGS"
+ pie="yes"
+elif test "$pie" = "yes"; then
+ error_exit "PIE not available due to missing toolchain support"
+else
+ echo "Disabling PIE due to missing toolchain support"
+ pie="no"
+fi
+
+# Detect support for PT_GNU_RELRO + DT_BIND_NOW.
+# The combination is known as "full relro", because .got.plt is read-only too.
+if compile_prog "" "-Wl,-z,relro -Wl,-z,now" ; then
+ QEMU_LDFLAGS="-Wl,-z,relro -Wl,-z,now $QEMU_LDFLAGS"
fi
##########################################
@@ -6498,49 +6493,6 @@
fi
fi
-# Probe for the need for relocating the user-only binary.
-if ( [ "$linux_user" = yes ] || [ "$bsd_user" = yes ] ) && [ "$pie" = no ]; then
- textseg_addr=
- case "$cpu" in
- arm | i386 | ppc* | s390* | sparc* | x86_64 | x32)
- # ??? Rationale for choosing this address
- textseg_addr=0x60000000
- ;;
- mips)
- # A 256M aligned address, high in the address space, with enough
- # room for the code_gen_buffer above it before the stack.
- textseg_addr=0x60000000
- ;;
- esac
- if [ -n "$textseg_addr" ]; then
- cat > $TMPC <<EOF
- int main(void) { return 0; }
-EOF
- textseg_ldflags="-Wl,-Ttext-segment=$textseg_addr"
- if ! compile_prog "" "$textseg_ldflags"; then
- # In case ld does not support -Ttext-segment, edit the default linker
- # script via sed to set the .text start addr. This is needed on FreeBSD
- # at least.
- if ! $ld --verbose >/dev/null 2>&1; then
- error_exit \
- "We need to link the QEMU user mode binaries at a" \
- "specific text address. Unfortunately your linker" \
- "doesn't support either the -Ttext-segment option or" \
- "printing the default linker script with --verbose." \
- "If you don't want the user mode binaries, pass the" \
- "--disable-user option to configure."
- fi
-
- $ld --verbose | sed \
- -e '1,/==================================================/d' \
- -e '/==================================================/,$d' \
- -e "s/[.] = [0-9a-fx]* [+] SIZEOF_HEADERS/. = $textseg_addr + SIZEOF_HEADERS/" \
- -e "s/__executable_start = [0-9a-fx]*/__executable_start = $textseg_addr/" > config-host.ld
- textseg_ldflags="-Wl,-T../config-host.ld"
- fi
- fi
-fi
-
# Check that the C++ compiler exists and works with the C compiler.
# All the QEMU_CXXFLAGS are based on QEMU_CFLAGS. Keep this at the end to don't miss any other that could be added.
if has $cxx; then
@@ -8175,10 +8127,6 @@
fi
fi
-if test "$target_linux_user" = "yes" || test "$target_bsd_user" = "yes" ; then
- ldflags="$ldflags $textseg_ldflags"
-fi
-
# Newer kernels on s390 check for an S390_PGSTE program header and
# enable the pgste page table extensions in that case. This makes
# the vm.allocate_pgste sysctl unnecessary. We enable this program
diff --git a/scripts/decodetree.py b/scripts/decodetree.py
index 2a8f2b6..46ab917 100755
--- a/scripts/decodetree.py
+++ b/scripts/decodetree.py
@@ -1025,7 +1025,7 @@
if extracted < self.width:
output(ind, 'insn = ', decode_function,
'_load_bytes(ctx, insn, {0}, {1});\n'
- .format(extracted / 8, self.width / 8));
+ .format(extracted // 8, self.width // 8));
extracted = self.width
# Attempt to aid the compiler in producing compact switch statements.
@@ -1079,7 +1079,7 @@
if extracted < self.width:
output(ind, 'insn = ', decode_function,
'_load_bytes(ctx, insn, {0}, {1});\n'
- .format(extracted / 8, self.width / 8));
+ .format(extracted // 8, self.width // 8));
extracted = self.width
output(ind, 'return insn;\n')
# end SizeLeaf
diff --git a/target/mips/translate.c b/target/mips/translate.c
index d745bd2..25b595a 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -5529,6 +5529,7 @@
{
uint32_t opc, shift_max;
TCGv_i64 t0, t1;
+ TCGCond cond;
opc = MASK_LMI(ctx->opcode);
switch (opc) {
@@ -5862,14 +5863,39 @@
case OPC_SEQU_CP2:
case OPC_SEQ_CP2:
+ cond = TCG_COND_EQ;
+ goto do_cc_cond;
+ break;
case OPC_SLTU_CP2:
+ cond = TCG_COND_LTU;
+ goto do_cc_cond;
+ break;
case OPC_SLT_CP2:
+ cond = TCG_COND_LT;
+ goto do_cc_cond;
+ break;
case OPC_SLEU_CP2:
+ cond = TCG_COND_LEU;
+ goto do_cc_cond;
+ break;
case OPC_SLE_CP2:
- /*
- * ??? Document is unclear: Set FCC[CC]. Does that mean the
- * FD field is the CC field?
- */
+ cond = TCG_COND_LE;
+ do_cc_cond:
+ {
+ int cc = (ctx->opcode >> 8) & 0x7;
+ TCGv_i64 t64 = tcg_temp_new_i64();
+ TCGv_i32 t32 = tcg_temp_new_i32();
+
+ tcg_gen_setcond_i64(cond, t64, t0, t1);
+ tcg_gen_extrl_i64_i32(t32, t64);
+ tcg_gen_deposit_i32(fpu_fcr31, fpu_fcr31, t32,
+ get_fp_bit(cc), 1);
+
+ tcg_temp_free_i32(t32);
+ tcg_temp_free_i64(t64);
+ }
+ goto no_rd;
+ break;
default:
MIPS_INVAL("loongson_cp2");
generate_exception_end(ctx, EXCP_RI);
@@ -5878,6 +5904,7 @@
gen_store_fpr64(ctx, t0, rd);
+no_rd:
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
}
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 223dba9..7f61eee 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -2855,9 +2855,13 @@
goto gen_simd;
#if TCG_TARGET_REG_BITS == 32
case INDEX_op_dup2_vec:
- /* Constraints have already placed both 32-bit inputs in xmm regs. */
- insn = OPC_PUNPCKLDQ;
- goto gen_simd;
+ /* First merge the two 32-bit inputs to a single 64-bit element. */
+ tcg_out_vex_modrm(s, OPC_PUNPCKLDQ, a0, a1, a2);
+ /* Then replicate the 64-bit elements across the rest of the vector. */
+ if (type != TCG_TYPE_V64) {
+ tcg_out_dup_vec(s, type, MO_64, a0, a0);
+ }
+ break;
#endif
case INDEX_op_abs_vec:
insn = abs_insn[vece];
