Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pc,virtio: last minute bugfixes
Two last minute bugfixes. They are both designed to prevent
compatibility headaches down the road.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Tue 06 Apr 2021 12:13:07 BST
# gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full]
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* remotes/mst/tags/for_upstream:
virtio-pci: compat page aligned ATS
x86: rename oem-id and oem-table-id properties
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index aa2bbd1..bc5f948 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -2670,19 +2670,19 @@
"Set on/off to enable/disable "
"ITS instantiation");
- object_class_property_add_str(oc, "oem-id",
+ object_class_property_add_str(oc, "x-oem-id",
virt_get_oem_id,
virt_set_oem_id);
- object_class_property_set_description(oc, "oem-id",
+ object_class_property_set_description(oc, "x-oem-id",
"Override the default value of field OEMID "
"in ACPI table header."
"The string may be up to 6 bytes in size");
- object_class_property_add_str(oc, "oem-table-id",
+ object_class_property_add_str(oc, "x-oem-table-id",
virt_get_oem_table_id,
virt_set_oem_table_id);
- object_class_property_set_description(oc, "oem-table-id",
+ object_class_property_set_description(oc, "x-oem-table-id",
"Override the default value of field OEM Table ID "
"in ACPI table header."
"The string may be up to 8 bytes in size");
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 9935c6d..a50f2d5 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -53,6 +53,7 @@
{ "nvme", "use-intel-id", "on"},
{ "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
{ "pl011", "migrate-clk", "off" },
+ { "virtio-pci", "x-ats-page-aligned", "off"},
};
const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index a733e2f..fd0fa15 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -963,16 +963,18 @@
pci_set_quad(dev->config + offset + pci_dsn_cap, ser_num);
}
-void pcie_ats_init(PCIDevice *dev, uint16_t offset)
+void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned)
{
pcie_add_capability(dev, PCI_EXT_CAP_ID_ATS, 0x1,
offset, PCI_EXT_CAP_ATS_SIZEOF);
dev->exp.ats_cap = offset;
- /* Invalidate Queue Depth 0, Page Aligned Request 1 */
- pci_set_word(dev->config + offset + PCI_ATS_CAP,
- PCI_ATS_CAP_PAGE_ALIGNED);
+ /* Invalidate Queue Depth 0 */
+ if (aligned) {
+ pci_set_word(dev->config + offset + PCI_ATS_CAP,
+ PCI_ATS_CAP_PAGE_ALIGNED);
+ }
/* STU 0, Disabled by default */
pci_set_word(dev->config + offset + PCI_ATS_CTRL, 0);
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index c1b67cf..b321604 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1856,7 +1856,8 @@
}
if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
- pcie_ats_init(pci_dev, last_pcie_cap_offset);
+ pcie_ats_init(pci_dev, last_pcie_cap_offset,
+ proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
}
@@ -1933,6 +1934,8 @@
ignore_backend_features, false),
DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_ATS_BIT, false),
+ DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
+ VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h
index d7d5d40..2446dcd 100644
--- a/hw/virtio/virtio-pci.h
+++ b/hw/virtio/virtio-pci.h
@@ -42,6 +42,7 @@
VIRTIO_PCI_FLAG_INIT_PM_BIT,
VIRTIO_PCI_FLAG_INIT_FLR_BIT,
VIRTIO_PCI_FLAG_AER_BIT,
+ VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT,
};
/* Need to activate work-arounds for buggy guests at vmstate load. */
@@ -84,6 +85,10 @@
/* Advanced Error Reporting capability */
#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT)
+/* Page Aligned Address space Translation Service */
+#define VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED \
+ (1 << VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT)
+
typedef struct {
MSIMessage msg;
int virq;
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 26c9cc4..c09b648 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -78,8 +78,8 @@
#define X86_MACHINE_SMM "smm"
#define X86_MACHINE_ACPI "acpi"
-#define X86_MACHINE_OEM_ID "oem-id"
-#define X86_MACHINE_OEM_TABLE_ID "oem-table-id"
+#define X86_MACHINE_OEM_ID "x-oem-id"
+#define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id"
#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE)
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
index 14c58eb..6063bee 100644
--- a/include/hw/pci/pcie.h
+++ b/include/hw/pci/pcie.h
@@ -137,7 +137,7 @@
void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn);
void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num);
-void pcie_ats_init(PCIDevice *dev, uint16_t offset);
+void pcie_ats_init(PCIDevice *dev, uint16_t offset, bool aligned);
void pcie_cap_slot_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
Error **errp);
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index e020c83..156d417 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -73,7 +73,7 @@
#define OEM_ID "TEST"
#define OEM_TABLE_ID "OEM"
-#define OEM_TEST_ARGS "-machine oem-id="OEM_ID",oem-table-id="OEM_TABLE_ID
+#define OEM_TEST_ARGS "-machine x-oem-id="OEM_ID",x-oem-table-id="OEM_TABLE_ID
typedef struct {
bool tcg_only;
