test/src/apl12-psb.ptt

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; APL12: Intel(R) PT OVF May Be Followed By An Unexpected FUP Packet.
;
;        Certain Intel PT (Processor Trace) packets including FUPs (Flow
;        Update Packets), should be issued only between TIP.PGE (Target IP
;        Packet - Packet Generaton Enable) and TIP.PGD (Target IP Packet -
;        Packet Generation Disable) packets.  When outside a TIP.PGE/TIP.PGD
;        pair, as a result of IA32_RTIT_STATUS.FilterEn[0] (MSR 571H) being
;        cleared, an OVF (Overflow) packet may be unexpectedly followed by a
;        FUP.
;
;  cpu 6/92
;  cpu 6/95
;
; Variant: Extra FUP followed by PSB+.
;

org 0x1000
bits 64

; @pt p0:  psb()
; @pt p1:  mode.exec(64bit)
; @pt p2:  fup(3: %l0)
; @pt p3:  psbend()
l0: hlt

; @pt p4:  ovf()
; @pt p5:  fup(3: %l1)
l1: hlt

; @pt p6:  psb()
; @pt p7:  mode.exec(64bit)
; @pt p8:  psbend()

; @pt p9:  tip.pge(3: %l2)
l2: nop

; @pt p10: fup(1: %l3)
; @pt p11: tip.pgd(0: %l3)
l3: hlt


; @pt .exp(ptdump)
;%0p0  psb
;%0p1  mode.exec  cs.l
;%0p2  fup        3: %?l0
;%0p3  psbend
;%0p4  ovf
;%0p5  fup        3: %?l1
;%0p6  psb
;%0p7  mode.exec  cs.l
;%0p8  psbend
;%0p9  tip.pge    3: %?l2
;%0p10 fup        1: %?l3.2
;%0p11 tip.pgd    0: %?l3.0


; @pt .exp(ptxed)
;[overflow]
;[enabled]
;%0l2
;[disabled]