src/intel/compiler/tests/gen12/sync.asm

sync nop(16)                    null<0,1,0>UB                   { align1 WE_all 1H @1 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @1 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @2 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @3 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @4 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @5 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @6 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N @7 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @1 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @2 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @3 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @4 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @5 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @6 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 3N @7 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @1 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @2 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @3 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @4 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @5 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @6 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 5N @7 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @1 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @2 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @3 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @4 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @5 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @6 };
sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 7N @7 };
sync nop(32)                    null<0,1,0>UB                   { align1 WE_all @1 };
sync nop(8)                     null<0,1,0>UB                   { align1 WE_all 1Q @1 };
sync allwr(16)                  null<0,1,0>UB                   { align1 1H };
sync allwr(8)                   null<0,1,0>UB                   { align1 1Q };