blob: b5965fd3ce4d94a698ef86886fd20eddcf7d9fb8 [file] [log] [blame]
<!--
Copyright (C) 2020 Collabora Ltd.
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice (including the next
paragraph) shall be included in all copies or substantial portions of the
Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
-->
<bifrost>
<ins name="*ARSHIFT.i32" mask="0x7ff838" exact="0x335018">
<src start="0" mask="0xfb"/>
<src start="3" mask="0x8"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="*ARSHIFT.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0x8"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<encoding mask="0x7ff838" exact="0x334818">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7ff838" exact="0x335818">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*ARSHIFT.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0x8"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<encoding mask="0x7ff838" exact="0x334018">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7ffe38" exact="0x335818">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*ARSHIFT_DOUBLE.i32" mask="0x7ff000" exact="0x33e000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="result_word" start="11" size="1" default="w0">
<opt>w0</opt>
<opt>w1</opt>
</mod>
</ins>
<ins name="*ATOM_C.i32" mask="0x7fe000" exact="0x2f4000" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<src start="6" mask="0xf7"/>
<mod name="atom_opc" start="9" size="4">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_C.i64" mask="0x7fe000" exact="0x2f0000" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<src start="6" mask="0xf7"/>
<mod name="atom_opc" start="9" size="4">
<opt>aaddu</opt>
<opt>aadds</opt>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_C1.i32" mask="0x7ffe00" exact="0x2f5e00" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
</ins>
<ins name="*ATOM_C1.i64" mask="0x7ffe00" exact="0x2f1e00" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
</ins>
<ins name="*ATOM_C1_RETURN.i32" mask="0x7ffe00" exact="0x2f7e00" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
</ins>
<ins name="*ATOM_C1_RETURN.i64" mask="0x7ffe00" exact="0x2f3e00" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
</ins>
<ins name="*ATOM_C_RETURN.i32" mask="0x7fe000" exact="0x2f6000" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<src start="6" mask="0xf7"/>
<mod name="atom_opc" start="9" size="4">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_C_RETURN.i64" mask="0x7fe000" exact="0x2f2000" last="true" dests="0">
<src start="0" mask="0xf3"/>
<src start="3" mask="0xf3"/>
<src start="6" mask="0xf7"/>
<mod name="atom_opc" start="9" size="4">
<opt>aaddu</opt>
<opt>aadds</opt>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_POST.i32" mask="0x7ffc00" exact="0x6ee400">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="atom_opc" start="6" size="4">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_POST.i64" mask="0x7ffc00" exact="0x6ee000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="atom_opc" start="6" size="4">
<opt>aaddu</opt>
<opt>aadds</opt>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*ATOM_PRE.i64" mask="0x7fe000" exact="0x6ec000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="atom_opc" start="9" size="4">
<opt>aaddu</opt>
<opt>aadds</opt>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="*BITREV.i32" mask="0x7ffff8" exact="0x701fc0">
<src start="0" mask="0xfb"/>
</ins>
<ins name="*CLZ.u32" mask="0x7ffff0" exact="0x701fd0">
<src start="0" mask="0xfb"/>
<mod name="mask" start="3" size="1" opt="mask"/>
</ins>
<ins name="*CLZ.v2u16" mask="0x7fffc0" exact="0x701ec0">
<src start="0" mask="0xfb"/>
<mod name="mask" start="3" size="1" opt="mask"/>
<mod name="swz0" start="4" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="*CLZ.v4u8" mask="0x7ffff0" exact="0x701f90">
<src start="0" mask="0xfb"/>
<mod name="mask" start="3" size="1" opt="mask"/>
</ins>
<ins name="*CSEL.f32" mask="0x7fc000" exact="0x2e0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="2">
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
<swap left="2" right="3">
<eq left="cmpf" right="#ne"/>
<rewrite name="cmpf">
<map from="ne" to="eq"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.i32" mask="0x7f8000" exact="0x2e0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<reserved/>
<reserved/>
<eq left="cmpf" right="#eq"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="2" right="3">
<eq left="cmpf" right="#ne"/>
<rewrite name="cmpf">
<map from="ne" to="eq"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.s32" mask="0x7fe000" exact="0x2e4000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.u32" mask="0x7fe000" exact="0x2e6000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.v2f16" mask="0x7fc000" exact="0x6e0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="2">
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
<swap left="2" right="3">
<eq left="cmpf" right="#ne"/>
<rewrite name="cmpf">
<map from="ne" to="eq"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.v2i16" mask="0x7f8000" exact="0x6e0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<reserved/>
<reserved/>
<eq left="cmpf" right="#eq"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="2" right="3">
<eq left="cmpf" right="#ne"/>
<rewrite name="cmpf">
<map from="ne" to="eq"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.v2s16" mask="0x7fe000" exact="0x6e4000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="*CSEL.v2u16" mask="0x7fe000" exact="0x6e6000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="*CUBEFACE1" mask="0x7ffc00" exact="0x706800">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="neg2" size="1" opt="neg"/>
<derived start="9" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
<eq left="neg2" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
<eq left="neg2" right="#neg"/>
</and>
</derived>
</ins>
<ins name="*DTSEL_IMM" mask="0x7fffe0" exact="0x70f3e0">
<src start="0" mask="0xfb"/>
<mod name="table" start="3" size="2">
<opt>attribute_1</opt>
<opt>attribute_2</opt>
<opt>none</opt> <!-- actually reserved, used as sentinel -->
<opt>flat</opt>
</mod>
</ins>
<ins name="*F16_TO_F32" mask="0x7ffff0" exact="0x700d10">
<src start="0" mask="0xfb"/>
<mod name="lane0" start="3" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="*FADD.f32" mask="0x7e0000" exact="0x2c0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="abs1" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="abs0" start="12" size="1" opt="abs"/>
<mod name="round" start="13" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<derived start="9" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#none"/>
</and>
</derived>
<swap left="0" right="1">
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
</swap>
</ins>
<ins name="*FADD.v2f16" mask="0x7e0000" exact="0x6c0000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="round" start="13" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<derived start="6" size="1">
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="abs0" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs1" right="#abs"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
</swap>
</ins>
<ins name="*FADD_LSCALE.f32" mask="0x7ffc00" exact="0x70f400">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="abs0" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="abs1" start="8" size="1" opt="abs"/>
<mod name="neg1" start="9" size="1" opt="neg"/>
</ins>
<ins name="*FCMP.f32" mask="0x7c0000" exact="0x240000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="abs1" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="abs0" start="12" size="1" opt="abs"/>
<mod name="cmpf" start="13" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
<opt>gtlt</opt>
<opt>total</opt>
</mod>
<mod name="result_type" start="16" size="2" default="i1">
<opt>i1</opt>
<opt>f1</opt>
<opt>m1</opt>
</mod>
<derived start="9" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#none"/>
</and>
</derived>
<swap left="0" right="1">
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="*FCMP.v2f16" mask="0x7c0000" exact="0x640000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
<opt>gtlt</opt>
<opt>total</opt>
</mod>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="result_type" start="16" size="2" default="i1">
<opt>i1</opt>
<opt>f1</opt>
<opt>m1</opt>
</mod>
<derived start="6" size="1">
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
</derived>
<derived start="13" size="3">
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#gtlt"/>
<and>
<eq left="cmpf" right="#total"/>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
</and>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="abs0" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs1" right="#abs"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="*FLSHIFT_DOUBLE.i32" mask="0x7ff800" exact="0x33f800">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
</ins>
<ins name="*FMA.f32" mask="0x600000" exact="0x0">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="abs0" start="12" size="1" opt="abs"/>
<mod name="round" start="13" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="abs1" start="19" size="1" opt="abs"/>
<mod name="neg2" start="18" size="1" opt="neg"/>
<mod name="abs2" start="20" size="1" opt="abs"/>
<derived start="9" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#none"/>
</and>
</derived>
<derived start="17" size="1">
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</or>
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
</swap>
</ins>
<ins name="*FMA.v2f16" mask="0x600000" exact="0x400000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="round" start="13" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
<mod name="clamp" start="15" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="neg2" start="18" size="1" opt="neg"/>
<mod name="swz2" start="19" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<derived start="17" size="1">
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</or>
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</or>
</derived>
</ins>
<ins name="*FMA_RSCALE.f32" mask="0x7c0000" exact="0x280000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="round" size="1" opt="rtz"/>
<mod name="clamp" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="abs0" start="15" size="1" opt="abs"/>
<mod name="neg2" start="17" size="1" opt="neg"/>
<mod name="special" size="2">
<opt>none</opt>
<opt>n</opt>
<opt>left</opt>
<opt>scale16</opt>
</mod>
<derived start="16" size="1">
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</or>
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</or>
</derived>
<derived start="12" size="3">
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_0_inf"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_m1_1"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_0_1"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtz"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#scale16"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#left"/>
<eq left="round" right="#none"/>
</and>
</derived>
</ins>
<ins name="*FMA_RSCALE.v2f16" mask="0x7c0000" exact="0x680000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="round" size="1" opt="rtz"/>
<mod name="clamp" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="abs0" start="15" size="1" opt="abs"/>
<mod name="neg2" start="17" size="1" opt="neg"/>
<mod name="special" size="2">
<opt>none</opt>
<opt>n</opt>
<opt>left</opt>
</mod>
<derived start="16" size="1">
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</or>
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<and alias="true">
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</or>
</derived>
<derived start="12" size="3">
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_0_inf"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_m1_1"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#clamp_0_1"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtz"/>
</and>
<reserved/>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#left"/>
<eq left="round" right="#none"/>
</and>
</derived>
</ins>
<ins name="*FMUL_CSLICE" mask="0x7ffe00" exact="0x70d000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="lane0" start="6" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="abs0" start="7" size="1" opt="abs"/>
<mod name="neg0" start="8" size="1" opt="neg"/>
</ins>
<ins name="*FMUL_SLICE.f32" mask="0x7fffc0" exact="0x70cb40">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
</ins>
<ins name="*FREXPE.f32">
<src start="0" mask="0xfb"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0x7ffea0" exact="0x701c20">
<eq left="log" right="#none"/>
<copy name="neg0" start="6"/>
<copy name="sqrt" start="8"/>
</encoding>
<encoding mask="0x7fffe0" exact="0x701e20">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
</encoding>
</ins>
<ins name="*FREXPE.v2f16">
<src start="0" mask="0xfb"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0x7ffea0" exact="0x701c00">
<eq left="log" right="#none"/>
<copy name="neg0" start="6"/>
<copy name="sqrt" start="8"/>
</encoding>
<encoding mask="0x7fffe0" exact="0x701e00">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
</encoding>
</ins>
<ins name="*FREXPM.f32">
<src start="0" mask="0xfb"/>
<mod name="abs0" start="6" size="1" opt="abs"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<encoding mask="0x7fff20" exact="0x701b20">
<and>
<eq left="log" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
<copy name="sqrt" start="7"/>
</encoding>
<encoding mask="0x7fff20" exact="0x701a20">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
</and>
<copy name="neg0" start="7"/>
</encoding>
</ins>
<ins name="*FREXPM.v2f16">
<src start="0" mask="0xfb"/>
<mod name="abs0" start="6" size="1" opt="abs"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<encoding mask="0x7fff20" exact="0x701b00">
<and>
<eq left="log" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
<copy name="sqrt" start="7"/>
</encoding>
<encoding mask="0x7fff20" exact="0x701a00">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
</and>
<copy name="neg0" start="7"/>
</encoding>
</ins>
<ins name="*FROUND.f32">
<src start="0" mask="0xfb"/>
<mod name="abs0" start="7" size="1" opt="abs"/>
<mod name="neg0" start="8" size="1" opt="neg"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0x7ff860" exact="0x70c020">
<neq left="round" right="#rtna"/>
<derived start="9" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0x7ffe60" exact="0x707620">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="*FROUND.v2f16">
<src start="0" mask="0xfb"/>
<mod name="abs0" start="7" size="1" opt="abs"/>
<mod name="neg0" start="8" size="1" opt="neg"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0x7ff860" exact="0x70c000">
<neq left="round" right="#rtna"/>
<derived start="9" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0x7ffe60" exact="0x707600">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="*FRSHIFT_DOUBLE.i32" mask="0x7ff800" exact="0x33f000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
</ins>
<ins name="*IADDC.i32" mask="0x7ffe00" exact="0x27fc00">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
</ins>
<ins name="*IDP.v4i8" mask="0x7ff9c0" exact="0x73e8c0">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="sign0" start="9" size="1">
<opt>zext</opt>
<opt>sext</opt>
</mod>
<mod name="sign1" start="10" size="1">
<opt>zext</opt>
<opt>sext</opt>
</mod>
</ins>
<ins name="*IMUL.i32">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="widen1" size="3">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="extend" size="2">
<opt>none</opt>
<opt>sext</opt>
<opt>zext</opt>
</mod>
<encoding mask="0x7fffc0" exact="0x73c0c0">
<and>
<eq left="extend" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
</encoding>
<encoding mask="0x7ff9c0" exact="0x73c8c0">
<and>
<neq left="extend" right="#none"/>
<or>
<eq left="widen1" right="#h0"/>
<eq left="widen1" right="#h1"/>
</or>
</and>
<derived start="9" size="1">
<eq left="widen1" right="#h0"/>
<eq left="widen1" right="#h1"/>
</derived>
<derived start="10" size="1">
<eq left="extend" right="#zext"/>
<eq left="extend" right="#sext"/>
</derived>
</encoding>
<encoding mask="0x7ff1c0" exact="0x73b0c0">
<and>
<neq left="extend" right="#none"/>
<or>
<eq left="widen1" right="#b0"/>
<eq left="widen1" right="#b1"/>
<eq left="widen1" right="#b2"/>
<eq left="widen1" right="#b3"/>
</or>
</and>
<derived start="9" size="2">
<eq left="widen1" right="#b0"/>
<eq left="widen1" right="#b1"/>
<eq left="widen1" right="#b2"/>
<eq left="widen1" right="#b3"/>
</derived>
<derived start="11" size="1">
<eq left="extend" right="#zext"/>
<eq left="extend" right="#sext"/>
</derived>
</encoding>
</ins>
<ins name="*IMUL.v2i16" mask="0x7fe1c0" exact="0x7240c0">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="*IMUL.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="replicate0" size="3" default="b0123">
<opt>b0123</opt>
</mod>
<mod name="replicate1" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<encoding mask="0x7fffc0" exact="0x73e0c0">
<and>
<eq left="replicate0" right="#b0123"/>
<eq left="replicate1" right="#b0123"/>
</and>
</encoding>
<encoding mask="0x7ff9c0" exact="0x7380c0">
<and>
<eq left="replicate0" right="#b0123"/>
<neq left="replicate1" right="#b0123"/>
</and>
<derived start="9" size="2">
<eq left="replicate1" right="#b0000"/>
<eq left="replicate1" right="#b1111"/>
<eq left="replicate1" right="#b2222"/>
<eq left="replicate1" right="#b3333"/>
</derived>
</encoding>
</ins>
<ins name="*IMULD" mask="0x7fff80" exact="0x70f100">
<src start="0" mask="0x33"/>
<src start="3" mask="0x33"/>
<mod name="threads" start="6" size="1" default="odd">
<opt>even</opt>
<opt>odd</opt>
</mod>
</ins>
<ins name="*ISUBB.i32" mask="0x7ffe00" exact="0x27fe00">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
</ins>
<ins name="*JUMP_EX" mask="0x7ff000" exact="0x2eb000" last="true">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="test_mode" start="9" size="1" default="z">
<opt>z</opt>
<opt>nz</opt>
</mod>
<mod name="stack_mode" start="10" size="2">
<opt>return</opt>
<opt>call</opt>
<opt>none</opt>
<opt>replace</opt>
</mod>
</ins>
<ins name="*LROT_DOUBLE.i32" mask="0x7ff000" exact="0x33b000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="result_word" start="11" size="1" default="w0">
<opt>w0</opt>
<opt>w1</opt>
</mod>
</ins>
<ins name="*LSHIFT_AND.i32" mask="0x7f3800" exact="0x311000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
</ins>
<ins name="*LSHIFT_AND.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7f3800" exact="0x310800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7f3800" exact="0x311800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*LSHIFT_AND.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7f3800" exact="0x310000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7f3e00" exact="0x311800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*LSHIFT_DOUBLE.i32" mask="0x7ff000" exact="0x33c000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="result_word" start="11" size="1" default="w0">
<opt>w0</opt>
<opt>w1</opt>
</mod>
</ins>
<ins name="*LSHIFT_OR.i32" mask="0x7f3800" exact="0x313000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
</ins>
<ins name="*LSHIFT_OR.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
<encoding mask="0x7f3800" exact="0x312800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7f3800" exact="0x313800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*LSHIFT_OR.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
<encoding mask="0x7f3800" exact="0x312000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7f3e00" exact="0x313800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*LSHIFT_XOR.i32" mask="0x7fd800" exact="0x325000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
</ins>
<ins name="*LSHIFT_XOR.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
<encoding mask="0x7fd800" exact="0x324800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7fd800" exact="0x325800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*LSHIFT_XOR.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
<encoding mask="0x7fd800" exact="0x324000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7fde00" exact="0x325800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*MKVEC.v2i16" mask="0x7fff00" exact="0x70f000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="lane0" start="6" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="lane1" start="7" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="*MKVEC.v4i8" mask="0x7f0000" exact="0x710000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="lane0" start="12" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="lane1" start="13" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="lane2" start="14" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="lane3" start="15" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
</ins>
<ins name="*MOV.i32" mask="0x7ffff8" exact="0x701968">
<src start="0" mask="0xfb"/>
</ins>
<ins name="*NOP.i32" mask="0x7fffff" exact="0x701963"/>
<ins name="*POPCOUNT.i32" mask="0x7ffff8" exact="0x73c6d8">
<src start="0" mask="0xfb"/>
</ins>
<ins name="*QUIET.f32" mask="0x7ffff8" exact="0x701970">
<src start="0" mask="0xfb"/>
</ins>
<ins name="*QUIET.v2f16" mask="0x7fffc8" exact="0x701900">
<src start="0" mask="0xfb"/>
<mod name="swz0" start="4" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="*RROT_DOUBLE.i32" mask="0x7ff000" exact="0x33a000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="result_word" start="11" size="1" default="w0">
<opt>w0</opt>
<opt>w1</opt>
</mod>
</ins>
<ins name="*RSHIFT_AND.i32" mask="0x7f3800" exact="0x301000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
</ins>
<ins name="*RSHIFT_AND.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7f3800" exact="0x300800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7f3800" exact="0x301800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*RSHIFT_AND.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not1" start="14" size="1" opt="not"/>
<mod name="not_result" start="15" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7f3800" exact="0x300000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7f3e00" exact="0x301800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*RSHIFT_DOUBLE.i32" mask="0x7ff000" exact="0x33d000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="bytes2" start="9" size="1" opt="bytes2"/>
<mod name="lane2" start="10" size="1" default="b0">
<opt>b0</opt>
<opt>b2</opt>
</mod>
<mod name="result_word" start="11" size="1" default="w0">
<opt>w0</opt>
<opt>w1</opt>
</mod>
</ins>
<ins name="*RSHIFT_OR.i32" mask="0x7f3800" exact="0x303000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
</ins>
<ins name="*RSHIFT_OR.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
<encoding mask="0x7f3800" exact="0x302800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7f3800" exact="0x303800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*RSHIFT_OR.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not1" start="14" size="1">
<opt>not</opt>
<opt>none</opt>
</mod>
<mod name="not_result" start="15" size="1" opt="not"/>
<encoding mask="0x7f3800" exact="0x302000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7f3e00" exact="0x303800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*RSHIFT_XOR.i32" mask="0x7fd800" exact="0x321000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lane2" start="9" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
</ins>
<ins name="*RSHIFT_XOR.v2i16">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b02">
<opt>b00</opt>
<opt>b11</opt>
<opt>b22</opt>
<opt>b33</opt>
<opt>b01</opt>
<opt>b23</opt>
<opt>b02</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
<encoding mask="0x7fd800" exact="0x320800">
<or>
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</or>
<derived start="9" size="2">
<eq left="lanes2" right="#b00"/>
<eq left="lanes2" right="#b11"/>
<eq left="lanes2" right="#b22"/>
<eq left="lanes2" right="#b33"/>
</derived>
</encoding>
<encoding mask="0x7fd800" exact="0x321800">
<or>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</or>
<derived start="9" size="2">
<reserved/>
<eq left="lanes2" right="#b01"/>
<eq left="lanes2" right="#b23"/>
<eq left="lanes2" right="#b02"/>
</derived>
</encoding>
</ins>
<ins name="*RSHIFT_XOR.v4i8">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="lanes2" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
</mod>
<mod name="not_result" start="13" size="1" opt="not"/>
<encoding mask="0x7fd800" exact="0x320000">
<neq left="lanes2" right="#b0123"/>
<derived start="9" size="2">
<eq left="lanes2" right="#b0000"/>
<eq left="lanes2" right="#b1111"/>
<eq left="lanes2" right="#b2222"/>
<eq left="lanes2" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0x7fde00" exact="0x321800">
<eq left="lanes2" right="#b0123"/>
</encoding>
</ins>
<ins name="*S16_TO_S32" mask="0x7fffe8" exact="0x700cc0">
<src start="0" mask="0xfb"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="*S8_TO_S32" mask="0x7fffc8" exact="0x700b40">
<src start="0" mask="0xfb"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="*SEG_ADD" mask="0x7fff40" exact="0x701500">
<src start="0" mask="0xfb"/>
<mod name="seg" start="3" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" start="7" size="1" opt="preserve_null"/>
</ins>
<ins name="*SEG_SUB" mask="0x7fff40" exact="0x701540" unused="true">
<src start="0" mask="0xfb"/>
<mod name="seg" start="3" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" start="7" size="1" opt="preserve_null"/>
</ins>
<ins name="*SHADDXL.i64" mask="0x7ffe00" exact="0x70e600">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<immediate name="shift" start="6" size="3"/>
</ins>
<ins name="*SHADDXL.s32" mask="0x7ff800" exact="0x70e800">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<immediate name="shift" start="6" size="3"/>
<mod name="lane1" start="9" size="2">
<opt>h0</opt>
<opt>h1</opt>
<opt>none</opt>
</mod>
</ins>
<ins name="*SHADDXL.u32" mask="0x7ff800" exact="0x70e000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<immediate name="shift" start="6" size="3"/>
<mod name="lane1" start="9" size="2">
<opt>h0</opt>
<opt>h1</opt>
<opt>none</opt>
</mod>
</ins>
<ins name="*U16_TO_U32" mask="0x7fffe8" exact="0x700cc8">
<src start="0" mask="0xfb"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="*U8_TO_U32" mask="0x7fffc8" exact="0x700b48">
<src start="0" mask="0xfb"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="*V2F32_TO_V2F16" mask="0x7fe000" exact="0x6e8000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="clamp" start="8" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="round" start="10" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<derived start="6" size="1">
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
</and>
</derived>
<derived start="7" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</derived>
</ins>
<ins name="*VN_ASST1.f16" mask="0x7ff000" exact="0x6eb000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<mod name="h" start="9" size="1" opt="h"/>
<mod name="l" start="10" size="1" opt="l"/>
<mod name="neg2" start="11" size="1" opt="neg"/>
</ins>
<ins name="*VN_ASST1.f32" mask="0x7fe000" exact="0x27c000">
<src start="0" mask="0xfb"/>
<src start="3" mask="0xfb"/>
<src start="6"/>
<src start="9"/>
<mod name="neg2" start="12" size="1" opt="neg"/>
</ins>
<ins name="+ACMPSTORE.i32" staging="r=2" mask="0xffdc0" exact="0x648c0" message="atomic" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+ACMPSTORE.i64" staging="r=4" mask="0xffdc0" exact="0x64900" message="atomic" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+ACMPXCHG.i32" staging="rw=2" mask="0xffdc0" exact="0x644c0" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+ACMPXCHG.i64" staging="rw=4" mask="0xffdc0" exact="0x64500" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+ATEST" staging="w=1" mask="0xfff00" exact="0xc8f00" message="atest" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
<mod name="widen1" start="6" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+ATOM_CX" staging="rw=sr_count" mask="0xffe00" exact="0xd7400" message="atomic">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<ins name="+AXCHG.i32" staging="rw=1" mask="0xffdc0" exact="0x640c0" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+AXCHG.i64" staging="rw=2" mask="0xffdc0" exact="0x64100" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="9" size="1" opt="wls"/>
</ins>
<ins name="+BARRIER" mask="0xfffff" exact="0xd7874" message="barrier" last="true" dests="0"/>
<ins name="+BLEND" staging="r=sr_count" mask="0xffe00" exact="0xca800" message="blend" last="true">
<src start="0"/>
<src start="3" mask="0xf7"/>
<src start="6" mask="0xf7"/>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<ins name="+BRANCH.f16" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#le"/>
</or>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<and alias="true">
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</and>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#ne"/>
</or>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<or>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</or>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
<and alias="true">
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#eq"/>
<eq left="cmpf" right="#eq"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#gt"/>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#le"/>
</or>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCH.f32" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<reserved/>
</derived>
<derived start="9" size="3">
<reserved/>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#ne"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#ge"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#le"/>
</and>
<and alias="true">
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</and>
<or>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#gt"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#none"/>
<neq left="widen1" right="#none"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
<and alias="true">
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#eq"/>
<eq left="cmpf" right="#eq"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<or>
<and>
<neq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#gt"/>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="ordering" right="#lt"/>
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#le"/>
</or>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCH.i16" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#ne"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#eq"/>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<reserved/>
<and alias="true">
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#eq"/>
<eq left="cmpf" right="#eq"/>
</and>
<reserved/>
<reserved/>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#gt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
</swap>
</ins>
<ins name="+BRANCH.i32" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="12" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<reserved/>
<and alias="true">
<eq left="ordering" right="#eq"/>
<eq left="cmpf" right="#eq"/>
</and>
<reserved/>
<reserved/>
<or>
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="ordering" right="#gt"/>
<eq left="cmpf" right="#eq"/>
</and>
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ne"/>
</and>
</or>
</swap>
</ins>
<ins name="+BRANCH.s16" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<reserved/>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#le"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
<and alias="true">
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
</or>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#ge"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#gt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
</or>
<and alias="true">
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</or>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#gt"/>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCH.s32" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
<or>
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
<and alias="true">
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
</or>
</and>
</or>
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
<and>
<eq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
<and alias="true">
<eq left="ordering" right="#eq"/>
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</or>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<eq left="ordering" right="#gt"/>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCH.u16" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<reserved/>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#le"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#ge"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
</or>
<or>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
<eq left="cmpf" right="#gt"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
</or>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="widen1"/>
<eq left="ordering" right="#lt"/>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCH.u32" mask="0xf8000" exact="0x68000" last="true" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="3">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<derived start="9" size="3">
<and>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#lt"/>
</and>
<and>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#le"/>
</and>
<and>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#ge"/>
</and>
<and>
<neq left="ordering" right="#lt"/>
<eq left="cmpf" right="#gt"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<eq left="ordering" right="#lt"/>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+BRANCHC.i16" mask="0xff830" exact="0x6f030" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="combine" start="10" size="1">
<opt>any</opt>
<opt>all</opt>
</mod>
<mod name="lane0" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<derived start="9" size="1">
<eq left="lane0" right="#h0"/>
<eq left="lane0" right="#h1"/>
</derived>
<derived start="3" size="1">
<eq left="lane0" right="#h1"/>
<eq left="lane0" right="#h0"/>
</derived>
</ins>
<ins name="+BRANCHC.i32" mask="0xffa38" exact="0x6f238" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="combine" start="10" size="1">
<opt>any</opt>
<opt>all</opt>
</mod>
</ins>
<ins name="+BRANCHZ.f16" mask="0xff000" exact="0x6f000" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="4" size="2">
<reserved/>
<eq left="widen0" right="#h1"/>
<eq left="widen0" right="#h0"/>
<reserved/>
</derived>
<derived start="3" size="1">
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#le"/>
</or>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</derived>
<derived start="9" size="3">
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#eq"/>
</or>
<or>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
</or>
<or>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#lt"/>
</or>
</derived>
</ins>
<ins name="+BRANCHZ.f32" mask="0xff030" exact="0x6f000" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="3" size="1">
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#le"/>
</or>
<or>
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#lt"/>
</or>
</derived>
<derived start="9" size="3">
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<or>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#eq"/>
</or>
<or>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
</or>
<or>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#lt"/>
</or>
</derived>
</ins>
<ins name="+BRANCHZ.i16" mask="0xffe00" exact="0x6f800" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="4" size="2">
<reserved/>
<eq left="widen0" right="#h1"/>
<eq left="widen0" right="#h0"/>
<reserved/>
</derived>
<derived start="3" size="1">
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#eq"/>
</derived>
</ins>
<ins name="+BRANCHZ.i32" mask="0xffe30" exact="0x6f800" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="cmpf" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
<derived start="3" size="1">
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#eq"/>
</derived>
</ins>
<ins name="+BRANCHZ.s16" mask="0xff008" exact="0x6f008" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="4" size="2">
<reserved/>
<eq left="widen0" right="#h1"/>
<eq left="widen0" right="#h0"/>
<reserved/>
</derived>
<derived start="9" size="3">
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+BRANCHZ.s32" mask="0xff038" exact="0x6f008" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="9" size="3">
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+BRANCHZ.u16" mask="0xff008" exact="0x6f000" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="4" size="2">
<reserved/>
<eq left="widen0" right="#h1"/>
<eq left="widen0" right="#h0"/>
<reserved/>
</derived>
<derived start="9" size="3">
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+BRANCHZ.u32" mask="0xff038" exact="0x6f000" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="9" size="3">
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
<eq left="cmpf" right="#ge"/>
<eq left="cmpf" right="#gt"/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+BRANCH_DIVERG" mask="0xffe3f" exact="0x6f83c" last="true" dests="0">
<src start="6" mask="0xf7"/>
</ins>
<ins name="+BRANCH_LOWBITS.f32" mask="0xffe38" exact="0x6fa38" last="true" dests="0">
<src start="0"/>
<src start="6" mask="0xf7"/>
</ins>
<ins name="+BRANCH_NO_DIVERG" mask="0xffe3f" exact="0x6fa34" last="true" dests="0">
<src start="6" mask="0xf7"/>
</ins>
<ins name="+CLPER_V6.i32" mask="0xfffc0" exact="0x3f0c0">
<src start="0" mask="0x7"/>
<src start="3"/>
</ins>
<ins name="+CLPER_V7.i32" mask="0xfc000" exact="0x7c000">
<src start="0" mask="0x7"/>
<src start="3"/>
<mod name="lane_op" start="6" size="2">
<opt>none</opt>
<opt>xor</opt>
<opt>accumulate</opt>
<opt>shift</opt>
</mod>
<mod name="subgroup" start="8" size="2">
<opt>subgroup2</opt>
<opt>subgroup4</opt>
<opt>subgroup8</opt>
</mod>
<mod name="inactive_result" start="10" size="4">
<opt>zero</opt>
<opt>umax</opt>
<opt>i1</opt>
<opt>v2i1</opt>
<opt>smin</opt>
<opt>smax</opt>
<opt>v2smin</opt>
<opt>v2smax</opt>
<opt>v4smin</opt>
<opt>v4smax</opt>
<opt>f1</opt>
<opt>v2f1</opt>
<opt>infn</opt>
<opt>inf</opt>
<opt>v2infn</opt>
<opt>v2inf</opt>
</mod>
</ins>
<ins name="+CUBEFACE2" mask="0xffff8" exact="0x3de58">
<src start="0"/>
</ins>
<ins name="+CUBE_SSEL" mask="0xffc00" exact="0x3e000">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<derived start="9" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</derived>
</ins>
<ins name="+CUBE_TSEL" mask="0xffc00" exact="0x3e400">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<derived start="9" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</derived>
</ins>
<ins name="+DISCARD.f32" mask="0xff800" exact="0xc8800" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="cmpf" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<derived start="6" size="2">
<eq left="cmpf" right="#eq"/>
<eq left="cmpf" right="#ne"/>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</derived>
<derived start="8" size="3">
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<reserved/>
<reserved/>
<reserved/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</or>
<rewrite name="cmpf">
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+DOORBELL" mask="0xffff8" exact="0xd7860" unused="true" message="job_management" dests="0">
<src start="0"/>
</ins>
<ins name="+EUREKA" mask="0xffff8" exact="0xd7850" unused="true" message="job_management" dests="0">
<src start="0"/>
</ins>
<ins name="+F16_TO_F32" mask="0xffff0" exact="0x3cd10">
<src start="0"/>
<mod name="lane0" start="3" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+F16_TO_S32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="lane0" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0xfff48" exact="0x3c500">
<neq left="round" right="#rtna"/>
<copy name="lane0" start="7"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffd8" exact="0x3cc40">
<eq left="round" right="#rtna"/>
<copy name="lane0" start="5"/>
</encoding>
</ins>
<ins name="+F16_TO_U32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="lane0" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0xfff48" exact="0x3c508">
<neq left="round" right="#rtna"/>
<copy name="lane0" start="7"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffd8" exact="0x3cc48">
<eq left="round" right="#rtna"/>
<copy name="lane0" start="5"/>
</encoding>
</ins>
<ins name="+F32_TO_S32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0xfffc8" exact="0x3c980">
<neq left="round" right="#rtna"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xffff8" exact="0x3cca0">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="+F32_TO_U32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0xfffc8" exact="0x3c988">
<neq left="round" right="#rtna"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xffff8" exact="0x3cca8">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="+FADD.f32">
<src start="0"/>
<src start="3"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rto</opt>
</mod>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="clamp" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="abs0" size="1" opt="abs"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0xf0000" exact="0x20000">
<neq left="round" right="#rto"/>
<copy name="abs1" start="6"/>
<copy name="neg0" start="7"/>
<copy name="neg1" start="8"/>
<copy name="clamp" start="11"/>
<copy name="abs0" start="15"/>
<derived start="13" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
<derived start="9" size="2">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
</derived>
</encoding>
<encoding mask="0xfffc0" exact="0x75200">
<and>
<eq left="round" right="#rto"/>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
<eq left="clamp" right="#none"/>
</and>
</encoding>
<swap left="0" right="1">
<or>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#none"/>
</and>
</or>
</swap>
</ins>
<ins name="+FADD.v2f16" mask="0xf0000" exact="0xa0000">
<src start="0"/>
<src start="3"/>
<mod name="abs1" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="round" start="13" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
<mod name="abs0" start="15" size="1" opt="abs"/>
</ins>
<ins name="+FADD_RSCALE.f32" mask="0xe8000" exact="0x88000">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="clamp" size="1" opt="clamp_0_1"/>
<mod name="special" size="1" opt="n"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="abs1" start="12" size="1" opt="abs"/>
<mod name="neg0" start="13" size="1" opt="neg"/>
<mod name="neg1" start="14" size="1" opt="neg"/>
<mod name="abs0" start="16" size="1" opt="abs"/>
<derived start="9" size="3">
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<reserved/>
<and>
<eq left="clamp" right="#clamp_0_1"/>
<eq left="special" right="#none"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtna"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#none"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtp"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtn"/>
</and>
<and>
<eq left="clamp" right="#none"/>
<eq left="special" right="#n"/>
<eq left="round" right="#rtz"/>
</and>
</derived>
</ins>
<ins name="+FATAN_ASSIST.f16" mask="0xfff00" exact="0x67800" unused="true" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
<mod name="lane1" start="6" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="lane0" start="7" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+FATAN_ASSIST.f32" mask="0xfffc0" exact="0x67a00" unused="true" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
</ins>
<ins name="+FATAN_TABLE.f16" mask="0xfff00" exact="0x67900" unused="true" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
<mod name="lane1" start="6" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="lane0" start="7" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+FATAN_TABLE.f32" mask="0xfffc0" exact="0x67a40" unused="true" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
</ins>
<ins name="+FCMP.f32" mask="0xf0000" exact="0x30000">
<src start="0"/>
<src start="3"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="widen1" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="cmpf" start="6" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
<opt>gtlt</opt>
<opt>total</opt>
</mod>
<mod name="abs0" start="11" size="1" opt="abs"/>
<mod name="abs1" start="12" size="1" opt="abs"/>
<mod name="result_type" start="14" size="2" default="i1">
<opt>i1</opt>
<opt>f1</opt>
<opt>m1</opt>
</mod>
<derived start="9" size="2">
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h0"/>
</and>
<and>
<eq left="widen0" right="#none"/>
<eq left="widen1" right="#h1"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#h0"/>
</and>
</derived>
<derived start="13" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<and>
<eq left="widen0" right="#h0"/>
<eq left="widen1" right="#none"/>
</and>
<and>
<eq left="widen0" right="#h1"/>
<eq left="widen1" right="#none"/>
</and>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+FCMP.v2f16" mask="0xf0000" exact="0xb0000">
<src start="0"/>
<src start="3"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="cmpf" start="6" size="3">
<opt>eq</opt>
<opt>gt</opt>
<opt>ge</opt>
<opt>ne</opt>
<opt>lt</opt>
<opt>le</opt>
<opt>gtlt</opt>
<opt>total</opt>
</mod>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="result_type" start="14" size="2" default="i1">
<opt>i1</opt>
<opt>f1</opt>
<opt>m1</opt>
</mod>
<derived start="13" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#none"/>
</and>
</derived>
<swap left="0" right="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#neg"/>
</and>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
<map from="gt" to="lt"/>
<map from="ge" to="le"/>
</rewrite>
</swap>
</ins>
<ins name="+FCOS_TABLE.u6" mask="0xfffe8" exact="0x67a88" table="true">
<src start="0" mask="0xf7"/>
<mod name="offset" start="4" size="1" opt="offset"/>
</ins>
<ins name="+FEXP.f32" mask="0xfffc0" exact="0x66ac0" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
</ins>
<ins name="+FEXP_TABLE.u4" mask="0xfffe0" exact="0x67ac0" table="true">
<src start="0" mask="0xf7"/>
<mod name="adj" start="3" size="2">
<opt>none</opt>
<opt>small</opt>
<opt>low</opt>
</mod>
</ins>
<ins name="+FLOGD.f32" mask="0xffff8" exact="0x66340" table="true">
<src start="0" mask="0xf7"/>
</ins>
<ins name="+FLOG_TABLE.f32" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="mode" size="2">
<opt>red</opt>
<opt>base2</opt>
<opt>natural</opt>
</mod>
<mod name="precision" size="2">
<opt>none</opt>
<opt>high</opt>
<opt>low</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="divzero" size="1" opt="divzero"/>
<encoding mask="0xfffc0" exact="0x67300">
<and>
<eq left="mode" right="#red"/>
<eq left="widen0" right="#none"/>
<eq left="precision" right="#none"/>
</and>
<copy name="neg0" start="3"/>
<copy name="abs0" start="4"/>
<copy name="divzero" start="5"/>
</encoding>
<encoding mask="0xfff40" exact="0x67340">
<and>
<eq left="mode" right="#red"/>
<neq left="widen0" right="#none"/>
<eq left="precision" right="#none"/>
</and>
<copy name="neg0" start="3"/>
<copy name="abs0" start="4"/>
<copy name="divzero" start="5"/>
<derived start="7" size="1">
<eq left="widen0" right="#h0"/>
<eq left="widen0" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xfffc0" exact="0x67b00">
<and>
<neq left="mode" right="#red"/>
<eq left="widen0" right="#none"/>
<eq left="precision" right="#none"/>
<eq left="divzero" right="#none"/>
</and>
<copy name="neg0" start="3"/>
<copy name="abs0" start="4"/>
<derived start="5" size="1">
<eq left="mode" right="#base2"/>
<eq left="mode" right="#natural"/>
</derived>
</encoding>
<encoding mask="0xfff40" exact="0x67b40">
<and>
<neq left="mode" right="#red"/>
<neq left="widen0" right="#none"/>
<eq left="precision" right="#none"/>
<eq left="divzero" right="#none"/>
</and>
<copy name="neg0" start="3"/>
<copy name="abs0" start="4"/>
<derived start="5" size="1">
<eq left="mode" right="#base2"/>
<eq left="mode" right="#natural"/>
</derived>
<derived start="7" size="1">
<eq left="widen0" right="#h0"/>
<eq left="widen0" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xfffe0" exact="0x67ae0">
<and>
<neq left="mode" right="#red"/>
<eq left="widen0" right="#none"/>
<neq left="precision" right="#none"/>
<eq left="divzero" right="#none"/>
<eq left="abs0" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
<derived start="3" size="1">
<eq left="mode" right="#natural"/>
<eq left="mode" right="#base2"/>
</derived>
<derived start="4" size="1">
<eq left="precision" right="#high"/>
<eq left="precision" right="#low"/>
</derived>
</encoding>
</ins>
<ins name="+FMAX.f32" mask="0xf0600" exact="0x0">
<src start="0"/>
<src start="3"/>
<mod name="abs1" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="clamp" start="11" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="sem" start="13" size="2" default="nan_suppress">
<opt>nan_suppress</opt>
<opt>nan_propagate</opt>
<opt>c</opt>
<opt>inverse_c</opt>
</mod>
<mod name="abs0" start="15" size="1" opt="abs"/>
</ins>
<ins name="+FMAX.v2f16" mask="0xf8000" exact="0x80000">
<src start="0"/>
<src start="3"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="sem" start="13" size="2" default="nan_suppress">
<opt>nan_suppress</opt>
<opt>nan_propagate</opt>
<opt>c</opt>
<opt>inverse_c</opt>
</mod>
<derived start="6" size="1">
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="abs0" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs1" right="#abs"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<rewrite name="sem">
<map from="c" to="inverse_c"/>
<map from="inverse_c" to="c"/>
</rewrite>
</swap>
</ins>
<ins name="+FMIN.f32" mask="0xf0600" exact="0x10000">
<src start="0"/>
<src start="3"/>
<mod name="abs1" start="6" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="clamp" start="11" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="sem" start="13" size="2" default="nan_suppress">
<opt>nan_suppress</opt>
<opt>nan_propagate</opt>
<opt>c</opt>
<opt>inverse_c</opt>
</mod>
<mod name="abs0" start="15" size="1" opt="abs"/>
</ins>
<ins name="+FMIN.v2f16" mask="0xf8000" exact="0x90000">
<src start="0"/>
<src start="3"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" start="7" size="1" opt="neg"/>
<mod name="neg1" start="8" size="1" opt="neg"/>
<mod name="swz0" start="9" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="11" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="sem" start="13" size="2" default="nan_suppress">
<opt>nan_suppress</opt>
<opt>nan_propagate</opt>
<opt>c</opt>
<opt>inverse_c</opt>
</mod>
<derived start="6" size="1">
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<or>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#none"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
</derived>
<swap left="0" right="1">
<or>
<and>
<eq left="abs0" right="#none"/>
<eq left="ordering" right="#gt"/>
</and>
<and>
<eq left="abs1" right="#abs"/>
<neq left="ordering" right="#gt"/>
</and>
</or>
<rewrite name="sem">
<map from="c" to="inverse_c"/>
<map from="inverse_c" to="c"/>
</rewrite>
</swap>
</ins>
<ins name="+FPCLASS.f16" mask="0xffff0" exact="0x67c40" table="true">
<src start="0" mask="0xf7"/>
<mod name="lane0" start="3" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+FPCLASS.f32" mask="0xffff8" exact="0x67c50" table="true">
<src start="0" mask="0xf7"/>
</ins>
<ins name="+FPOW_SC_APPLY" mask="0xfffc0" exact="0x75080">
<src start="0"/>
<src start="3"/>
</ins>
<ins name="+FPOW_SC_DET.f16" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
<mod name="func" size="2">
<opt>pow</opt>
<opt>powr</opt>
<opt>pown</opt>
<opt>rootn</opt>
</mod>
<mod name="lane1" size="2">
<opt>h0</opt>
<opt>h1</opt>
<opt>none</opt>
</mod>
<mod name="lane0" start="7" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0xffe00" exact="0x67400">
<or>
<eq left="func" right="#pow"/>
<eq left="func" right="#powr"/>
</or>
<derived start="6" size="1">
<or>
<eq alias="true" left="lane1" right="#none"/>
<eq left="lane1" right="#h0"/>
</or>
<eq left="lane1" right="#h1"/>
</derived>
<derived start="8" size="1">
<eq left="func" right="#pow"/>
<eq left="func" right="#powr"/>
</derived>
</encoding>
<encoding mask="0xffe40" exact="0x67600">
<and>
<or>
<eq left="func" right="#pown"/>
<eq left="func" right="#rootn"/>
</or>
<eq left="lane1" right="#none"/>
</and>
<derived start="8" size="1">
<eq left="func" right="#pown"/>
<eq left="func" right="#rootn"/>
</derived>
</encoding>
</ins>
<ins name="+FPOW_SC_DET.f32" mask="0xffe40" exact="0x67640" table="true">
<src start="0" mask="0xf7"/>
<src start="3" mask="0xf7"/>
<mod name="func" start="7" size="2">
<opt>pow</opt>
<opt>powr</opt>
<opt>pown</opt>
<opt>rootn</opt>
</mod>
</ins>
<ins name="+FRCBRT_APPROX_A.f32" unused="true" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<mod name="divzero" start="5" size="1" opt="divzero"/>
<encoding mask="0xfffc0" exact="0x67200">
<eq left="widen0" right="#none"/>
</encoding>
<encoding mask="0xfff40" exact="0x67240">
<neq left="widen0" right="#none"/>
<derived start="7" size="1">
<eq left="widen0" right="#h0"/>
<eq left="widen0" right="#h1"/>
</derived>
</encoding>
</ins>
<ins name="+FRCBRT_APPROX_B.f32" mask="0xffff8" exact="0x67ab0" unused="true" table="true">
<src start="0" mask="0xf7"/>
</ins>
<ins name="+FRCBRT_APPROX_C.f32" mask="0xffff8" exact="0x67ab8" unused="true" table="true">
<src start="0" mask="0xf7"/>
</ins>
<ins name="+FRCP.f16" mask="0xffec0" exact="0x67080" table="true">
<src start="0" mask="0xf7"/>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<mod name="divzero" start="5" size="1" opt="divzero"/>
<mod name="lane0" start="8" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+FRCP.f32" mask="0xfffa0" exact="0x66000" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
</mod>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<derived start="6" size="1">
<eq left="widen0" right="#none"/>
<reserved/>
</derived>
</ins>
<ins name="+FRCP_APPROX.f32" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<mod name="divzero" start="5" size="1" opt="divzero"/>
<encoding mask="0xfffc0" exact="0x67000">
<eq left="widen0" right="#none"/>
</encoding>
<encoding mask="0xfff40" exact="0x67040">
<neq left="widen0" right="#none"/>
<derived start="7" size="1">
<eq left="widen0" right="#h0"/>
<eq left="widen0" right="#h1"/>
</derived>
</encoding>
</ins>
<ins name="+FREXPE.f32">
<src start="0"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<encoding mask="0xffea0" exact="0x3dc20">
<eq left="log" right="#none"/>
<copy name="neg0" start="6"/>
<copy name="sqrt" start="8"/>
</encoding>
<encoding mask="0xfffe0" exact="0x3de20">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
</encoding>
</ins>
<ins name="+FREXPE.v2f16">
<src start="0"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0xffea0" exact="0x3dc00">
<eq left="log" right="#none"/>
<copy name="neg0" start="6"/>
<copy name="sqrt" start="8"/>
</encoding>
<encoding mask="0xfffe0" exact="0x3de00">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
</encoding>
</ins>
<ins name="+FREXPM.f32">
<src start="0"/>
<mod name="abs0" start="6" size="1" opt="abs"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<encoding mask="0xfff20" exact="0x3db20">
<and>
<eq left="log" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
<copy name="sqrt" start="7"/>
</encoding>
<encoding mask="0xfff20" exact="0x3da20">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
</and>
<copy name="neg0" start="7"/>
</encoding>
</ins>
<ins name="+FREXPM.v2f16">
<src start="0"/>
<mod name="abs0" start="6" size="1" opt="abs"/>
<mod name="sqrt" size="1" opt="sqrt"/>
<mod name="log" size="1" opt="log"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="neg0" size="1" opt="neg"/>
<encoding mask="0xfff20" exact="0x3db00">
<and>
<eq left="log" right="#none"/>
<eq left="neg0" right="#none"/>
</and>
<copy name="sqrt" start="7"/>
</encoding>
<encoding mask="0xfff20" exact="0x3da00">
<and>
<eq left="log" right="#log"/>
<eq left="sqrt" right="#none"/>
</and>
<copy name="neg0" start="7"/>
</encoding>
</ins>
<ins name="+FROUND.f32" mask="0xff860" exact="0x3e820">
<src start="0"/>
<mod name="abs0" start="7" size="1" opt="abs"/>
<mod name="neg0" start="8" size="1" opt="neg"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="round" start="9" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
</ins>
<ins name="+FROUND.v2f16" mask="0xff860" exact="0x3e800">
<src start="0"/>
<mod name="abs0" start="7" size="1" opt="abs"/>
<mod name="neg0" start="8" size="1" opt="neg"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="round" start="9" size="2">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
</mod>
</ins>
<ins name="+FRSQ.f16" mask="0xffec0" exact="0x67280" table="true">
<src start="0" mask="0xf7"/>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<mod name="divzero" start="5" size="1" opt="divzero"/>
<mod name="lane0" start="8" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+FRSQ.f32" mask="0xfffa0" exact="0x66100" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
</mod>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<derived start="6" size="1">
<eq left="widen0" right="#none"/>
<reserved/>
</derived>
</ins>
<ins name="+FRSQ_APPROX.f32" table="true">
<src start="0" mask="0xf7"/>
<mod name="widen0" size="2">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="neg0" start="3" size="1" opt="neg"/>
<mod name="abs0" start="4" size="1" opt="abs"/>
<mod name="divzero" start="5" size="1" opt="divzero"/>
<encoding mask="0xfffc0" exact="0x67100">
<eq left="widen0" right="#none"/>
</encoding>
<encoding mask="0xfff40" exact="0x67140">
<neq left="widen0" right="#none"/>
<derived start="7" size="1">
<eq left="widen0" right="#h0"/>
<eq left="widen0" right="#h1"/>
</derived>
</encoding>
</ins>
<ins name="+FSINCOS_OFFSET.u6" mask="0xffff0" exact="0x67aa0" table="true">
<src start="0" mask="0xf7"/>
<mod name="scale" start="3" size="1" opt="scale"/>
</ins>
<ins name="+FSIN_TABLE.u6" mask="0xfffe8" exact="0x67a80" table="true">
<src start="0" mask="0xf7"/>
<mod name="offset" start="4" size="1" opt="offset"/>
</ins>
<ins name="+HADD.s32" mask="0xfefc0" exact="0xbc640">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
</ins>
<ins name="+HADD.u32" mask="0xfefc0" exact="0xbc6c0">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
</ins>
<ins name="+HADD.v2s16" mask="0xfe9c0" exact="0xbc840">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
<mod name="swap1" start="9" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="swap0" start="10" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
</ins>
<ins name="+HADD.v2u16" mask="0xfe9c0" exact="0xbc8c0">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
<mod name="swap1" start="9" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="swap0" start="10" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
</ins>
<ins name="+HADD.v4s8" mask="0xfefc0" exact="0xbc440">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
</ins>
<ins name="+HADD.v4u8" mask="0xfefc0" exact="0xbc4c0">
<src start="0"/>
<src start="3"/>
<mod name="round" start="12" size="1" default="rtn">
<opt>rtn</opt>
<opt>rtp</opt>
</mod>
</ins>
<ins name="+IABS.s32" mask="0xffff8" exact="0x3dea0">
<src start="0"/>
</ins>
<ins name="+IABS.v2s16" mask="0xfffc8" exact="0x3de88">
<src start="0"/>
<mod name="swz0" start="4" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="+IABS.v4s8" mask="0xffff8" exact="0x3deb0">
<src start="0"/>
</ins>
<ins name="+IADD.s32">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes1" size="3">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<encoding mask="0xffec0" exact="0xbc600">
<eq left="lanes1" right="#none"/>
</encoding>
<encoding mask="0xffcc0" exact="0xbec00">
<or>
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</or>
<derived start="9" size="1">
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xff8c0" exact="0xbe000">
<or>
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</or>
<derived start="9" size="2">
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</derived>
</encoding>
</ins>
<ins name="+IADD.u32">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes1" size="3">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<encoding mask="0xffe40" exact="0xbc600">
<eq left="lanes1" right="#none"/>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbec00">
<or>
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</or>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xff840" exact="0xbe000">
<or>
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</or>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
<derived start="9" size="2">
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</derived>
</encoding>
</ins>
<ins name="+IADD.v2s16">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="lanes1" size="3" default="h01">
<opt>h01</opt>
<opt>h10</opt>
<opt>h00</opt>
<opt>h11</opt>
<opt>b01</opt>
<opt>b23</opt>
</mod>
<encoding mask="0xff8c0" exact="0xbc800">
<and>
<or>
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</or>
<or>
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</derived>
<derived start="10" size="1">
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbec40">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbe800">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</derived>
</encoding>
</ins>
<ins name="+IADD.v2u16">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="lanes1" size="3" default="h01">
<opt>h01</opt>
<opt>h10</opt>
<opt>h00</opt>
<opt>h11</opt>
<opt>b01</opt>
<opt>b23</opt>
</mod>
<encoding mask="0xff840" exact="0xbc800">
<and>
<or>
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</or>
<or>
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</derived>
<derived start="10" size="1">
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbec40">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbe800">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</derived>
</encoding>
</ins>
<ins name="+IADD.v4s8">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="3" default="b0123">
<opt>b0123</opt>
</mod>
<mod name="lanes1" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<opt>b0101</opt>
<opt>b2323</opt>
</mod>
<encoding mask="0xffec0" exact="0xbc400">
<and>
<eq left="lanes0" right="#b0123"/>
<eq left="lanes1" right="#b0123"/>
</and>
</encoding>
<encoding mask="0xff8c0" exact="0xbe040">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</or>
</and>
<derived start="9" size="2">
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbe840">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
</ins>
<ins name="+IADD.v4u8">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="3" default="b0123">
<opt>b0123</opt>
</mod>
<mod name="lanes1" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<opt>b0101</opt>
<opt>b2323</opt>
</mod>
<encoding mask="0xffe40" exact="0xbc400">
<and>
<eq left="lanes0" right="#b0123"/>
<eq left="lanes1" right="#b0123"/>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
</encoding>
<encoding mask="0xff840" exact="0xbe040">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</or>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
<derived start="9" size="2">
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbe840">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</or>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
</ins>
<ins name="+ICMP.i32" mask="0xffb80" exact="0x7b300">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="6" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
</ins>
<ins name="+ICMP.s32" mask="0xffb80" exact="0x7b200">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="6" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMP.u32" mask="0xffb80" exact="0x7b280">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="6" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMP.v2i16" mask="0xff000" exact="0x7a000">
<src start="0"/>
<src start="3"/>
<mod name="swz0" start="6" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="8" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="11" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
</ins>
<ins name="+ICMP.v2s16" mask="0xfe800" exact="0x78000">
<src start="0"/>
<src start="3"/>
<mod name="swz0" start="6" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="8" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMP.v2u16" mask="0xfe800" exact="0x78800">
<src start="0"/>
<src start="3"/>
<mod name="swz0" start="6" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="swz1" start="8" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="12" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMP.v4i8" mask="0xffb80" exact="0x7b100">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="6" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
</ins>
<ins name="+ICMP.v4s8" mask="0xffb80" exact="0x7b000">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="6" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMP.v4u8" mask="0xffb80" exact="0x7b080">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" size="2">
<opt>gt</opt>
<opt>ge</opt>
<opt>lt</opt>
<opt>le</opt>
</mod>
<derived start="6" size="1">
<eq left="cmpf" right="#gt"/>
<eq left="cmpf" right="#ge"/>
</derived>
<swap left="0" right="1">
<or>
<eq left="cmpf" right="#lt"/>
<eq left="cmpf" right="#le"/>
</or>
<rewrite name="cmpf">
<map from="lt" to="gt"/>
<map from="le" to="ge"/>
</rewrite>
</swap>
</ins>
<ins name="+ICMPF.i32" mask="0xffe00" exact="0x7be00">
<src start="0"/>
<src start="3"/>
<src start="6"/>
</ins>
<ins name="+ICMPI.i32" mask="0xffb80" exact="0x7b900">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="6" size="1">
<opt>eq</opt>
<opt>ne</opt>
</mod>
</ins>
<ins name="+ICMPI.s32" mask="0xffb80" exact="0x7b800">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="6" size="1">
<opt>gt</opt>
<opt>ge</opt>
</mod>
</ins>
<ins name="+ICMPI.u32" mask="0xffb80" exact="0x7b880">
<src start="0"/>
<src start="3"/>
<mod name="result_type" start="10" size="1" default="i1">
<opt>i1</opt>
<opt>m1</opt>
</mod>
<mod name="cmpf" start="6" size="1">
<opt>gt</opt>
<opt>ge</opt>
</mod>
</ins>
<ins name="+ICMPM.i32" mask="0xffe00" exact="0x7ba00">
<src start="0"/>
<src start="3"/>
<src start="6"/>
</ins>
<ins name="+ILOGB.f32" mask="0xfffe0" exact="0x3d9e0">
<src start="0"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+ILOGB.v2f16" mask="0xfffe0" exact="0x3d9c0">
<src start="0"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="+IMOV_FMA" mask="0xffff7" exact="0xd7820">
<mod name="threads" start="3" size="1" default="odd">
<opt>even</opt>
<opt>odd</opt>
</mod>
</ins>
<ins name="+ISUB.s32">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes1" size="3">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<encoding mask="0xffec0" exact="0xbd600">
<eq left="lanes1" right="#none"/>
</encoding>
<encoding mask="0xffcc0" exact="0xbfc00">
<or>
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</or>
<derived start="9" size="1">
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xff8c0" exact="0xbf000">
<or>
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</or>
<derived start="9" size="2">
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</derived>
</encoding>
</ins>
<ins name="+ISUB.u32">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes1" size="3">
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
<encoding mask="0xffe40" exact="0xbd600">
<eq left="lanes1" right="#none"/>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbfc00">
<or>
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</or>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h0"/>
<eq left="lanes1" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xff840" exact="0xbf000">
<or>
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</or>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<eq left="lanes1" right="#none"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<neq left="lanes1" right="#none"/>
</or>
</derived>
<derived start="9" size="2">
<eq left="lanes1" right="#b0"/>
<eq left="lanes1" right="#b1"/>
<eq left="lanes1" right="#b2"/>
<eq left="lanes1" right="#b3"/>
</derived>
</encoding>
</ins>
<ins name="+ISUB.v2s16">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="lanes1" size="3" default="h01">
<opt>h01</opt>
<opt>h10</opt>
<opt>h00</opt>
<opt>h11</opt>
<opt>b01</opt>
<opt>b23</opt>
</mod>
<encoding mask="0xff8c0" exact="0xbd800">
<and>
<or>
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</or>
<or>
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</derived>
<derived start="10" size="1">
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbfc40">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbf800">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</derived>
</encoding>
</ins>
<ins name="+ISUB.v2u16">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="lanes1" size="3" default="h01">
<opt>h01</opt>
<opt>h10</opt>
<opt>h00</opt>
<opt>h11</opt>
<opt>b01</opt>
<opt>b23</opt>
</mod>
<encoding mask="0xff840" exact="0xbd800">
<and>
<or>
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</or>
<or>
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h01"/>
<eq left="lanes1" right="#h10"/>
</derived>
<derived start="10" size="1">
<eq left="lanes0" right="#h01"/>
<eq left="lanes0" right="#h10"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbfc40">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#h00"/>
<eq left="lanes1" right="#h11"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbf800">
<and>
<eq left="lanes0" right="#h01"/>
<or>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</and>
<derived start="7" size="1">
<and alias="true">
<eq left="saturate" right="#none"/>
<neq left="lanes1" right="#b01"/>
<neq left="lanes1" right="#b23"/>
</and>
<or>
<eq left="saturate" right="#sat"/>
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</or>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#b01"/>
<eq left="lanes1" right="#b23"/>
</derived>
</encoding>
</ins>
<ins name="+ISUB.v4s8">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="3" default="b0123">
<opt>b0123</opt>
</mod>
<mod name="lanes1" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<opt>b0101</opt>
<opt>b2323</opt>
</mod>
<encoding mask="0xffec0" exact="0xbd400">
<and>
<eq left="lanes0" right="#b0123"/>
<eq left="lanes1" right="#b0123"/>
</and>
</encoding>
<encoding mask="0xff8c0" exact="0xbf040">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</or>
</and>
<derived start="9" size="2">
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xbf840">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
</ins>
<ins name="+ISUB.v4u8">
<src start="0"/>
<src start="3"/>
<mod name="saturate" start="8" size="1" opt="sat"/>
<mod name="lanes0" size="3" default="b0123">
<opt>b0123</opt>
</mod>
<mod name="lanes1" size="3" default="b0123">
<opt>b0123</opt>
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<opt>b0101</opt>
<opt>b2323</opt>
</mod>
<encoding mask="0xffe40" exact="0xbd400">
<and>
<eq left="lanes0" right="#b0123"/>
<eq left="lanes1" right="#b0123"/>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
</encoding>
<encoding mask="0xff840" exact="0xbf040">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</or>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
<derived start="9" size="2">
<eq left="lanes1" right="#b0000"/>
<eq left="lanes1" right="#b1111"/>
<eq left="lanes1" right="#b2222"/>
<eq left="lanes1" right="#b3333"/>
</derived>
</encoding>
<encoding mask="0xffc40" exact="0xbf840">
<and>
<eq left="lanes0" right="#b0123"/>
<or>
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</or>
</and>
<derived start="7" size="1">
<eq alias="true" left="saturate" right="#none"/>
<eq left="saturate" right="#sat"/>
</derived>
<derived start="9" size="1">
<eq left="lanes1" right="#b0101"/>
<eq left="lanes1" right="#b2323"/>
</derived>
</encoding>
</ins>
<ins name="+JUMP" mask="0xffe3f" exact="0x6fe34" last="true" dests="0">
<src start="6" mask="0xf7"/>
</ins>
<ins name="+KABOOM" mask="0xffff8" exact="0xd7858" unused="true" message="job_management">
<src start="0"/>
</ins>
<ins name="+LDEXP.f32" mask="0xffe00" exact="0x74c00">
<src start="0"/>
<src start="3"/>
<mod name="round" start="6" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
<reserved/>
<opt>inf</opt>
<opt>inf0</opt>
</mod>
</ins>
<ins name="+LDEXP.v2f16" mask="0xffe00" exact="0x74e00">
<src start="0"/>
<src start="3"/>
<mod name="round" start="6" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
<reserved/>
<opt>inf</opt>
<opt>inf0</opt>
</mod>
</ins>
<ins name="+LD_ATTR" staging="w=format" message="attribute">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<mod name="vecsize" start="11" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<encoding mask="0xf0600" exact="0x40400">
<neq left="register_format" right="#auto"/>
<derived start="13" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xfe600" exact="0xc4400">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LD_ATTR_IMM" staging="w=format" message="attribute">
<src start="0"/>
<src start="3"/>
<immediate name="attribute_index" start="6" size="4"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<mod name="vecsize" start="11" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<encoding mask="0xf0400" exact="0x40000">
<neq left="register_format" right="#auto"/>
<derived start="13" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xfe400" exact="0xc4000">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LD_ATTR_TEX" staging="w=format" message="attribute">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<mod name="vecsize" start="11" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<encoding mask="0xf0600" exact="0x40600">
<neq left="register_format" right="#auto"/>
<derived start="13" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xfe600" exact="0xc4600">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LD_CVT" staging="w=format" mask="0xff800" exact="0xc9000" message="load">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="register_format" size="4" pseudo="true">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
</mod>
<mod name="vecsize" start="9" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
</ins>
<ins name="+LD_GCLK.u64" staging="w=2" mask="0xffff8" exact="0xd7800" message="attribute">
<mod name="source" start="0" size="3">
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>system_timestamp</opt>
<opt>cycle_counter</opt>
</mod>
</ins>
<ins name="+LD_TILE" staging="w=vecsize" mask="0xff800" exact="0xcb000" message="tile">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="vecsize" start="9" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
</ins>
<ins name="+LD_VAR" staging="w=vecsize" message="varying">
<src start="0"/>
<src start="3"/>
<mod name="vecsize" start="8" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="update" size="2">
<opt>store</opt>
<opt>retrieve</opt>
<opt>conditional</opt>
<opt>clobber</opt>
</mod>
<mod name="register_format" size="2">
<opt>f32</opt>
<opt>f16</opt>
<opt>auto</opt>
</mod>
<mod name="sample" size="3">
<opt>center</opt>
<opt>centroid</opt>
<opt>sample</opt>
<opt>explicit</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7c0c0" exact="0x500c0">
<neq left="register_format" right="#auto"/>
<derived start="19" size="1">
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#f16"/>
</derived>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
<encoding mask="0xfc0c0" exact="0xcc0c0">
<eq left="register_format" right="#auto"/>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
</ins>
<ins name="+LD_VAR_FLAT" staging="w=format" message="varying">
<src start="3"/>
<mod name="vecsize" start="8" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="register_format" size="3">
<opt>f32</opt>
<opt>f16</opt>
<opt>u32</opt>
<opt>s32</opt>
<opt>auto</opt>
</mod>
<mod name="function" start="0" size="3">
<reserved/>
<reserved/>
<reserved/>
<opt>none</opt>
<reserved/>
<reserved/>
<opt>and</opt>
<opt>or</opt>
</mod>
<encoding mask="0x7f8c0" exact="0x538c0">
<neq left="register_format" right="#auto"/>
<derived start="10" size="1">
<or>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#f16"/>
</or>
<or>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s32"/>
</or>
</derived>
<derived start="19" size="1">
<or>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#u32"/>
</or>
<or>
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#s32"/>
</or>
</derived>
</encoding>
<encoding mask="0xffcc0" exact="0xcf8c0">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LD_VAR_FLAT_IMM" staging="w=format" message="varying">
<immediate name="index" start="3" size="5"/>
<mod name="vecsize" start="8" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="register_format" size="3">
<opt>f32</opt>
<opt>f16</opt>
<opt>u32</opt>
<opt>s32</opt>
<opt>auto</opt>
</mod>
<mod name="function" start="0" size="3">
<reserved/>
<reserved/>
<reserved/>
<opt>none</opt>
<reserved/>
<reserved/>
<opt>and</opt>
<opt>or</opt>
</mod>
<encoding mask="0x7f800" exact="0x53800">
<neq left="register_format" right="#auto"/>
<derived start="10" size="1">
<or>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#f16"/>
</or>
<or>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s32"/>
</or>
</derived>
<derived start="19" size="1">
<or>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#u32"/>
</or>
<or>
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#s32"/>
</or>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0xcf800">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LD_VAR_IMM" staging="w=format" message="varying">
<src start="0"/>
<immediate name="index" start="3" size="5"/>
<mod name="vecsize" start="8" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="update" size="2">
<opt>store</opt>
<opt>retrieve</opt>
<opt>conditional</opt>
<opt>clobber</opt>
</mod>
<mod name="register_format" size="2">
<opt>f32</opt>
<opt>f16</opt>
<opt>auto</opt>
</mod>
<mod name="sample" size="3">
<opt>center</opt>
<opt>centroid</opt>
<opt>sample</opt>
<opt>explicit</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7c000" exact="0x50000">
<neq left="register_format" right="#auto"/>
<derived start="19" size="1">
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#f16"/>
</derived>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
<encoding mask="0xfc000" exact="0xcc000">
<eq left="register_format" right="#auto"/>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
</ins>
<ins name="+LD_VAR_SPECIAL" staging="w=format" message="varying">
<src start="0"/>
<mod name="varying_name" size="5">
<opt>point</opt>
<reserved/>
<opt>frag_w</opt>
<opt>frag_z</opt>
</mod>
<mod name="vecsize" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
<mod name="update" size="2">
<opt>store</opt>
<opt>retrieve</opt>
<opt>conditional</opt>
<opt>clobber</opt>
</mod>
<mod name="register_format" size="2">
<opt>f32</opt>
<opt>f16</opt>
<opt>auto</opt>
</mod>
<mod name="sample" size="3">
<opt>center</opt>
<opt>centroid</opt>
<opt>sample</opt>
<opt>explicit</opt>
<opt>none</opt>
</mod>
<encoding mask="0x7c3e0" exact="0x500a0">
<neq left="register_format" right="#auto"/>
<derived start="3" size="2">
<and>
<eq left="varying_name" right="#point"/>
<eq left="vecsize" right="#v2"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<and>
<eq left="varying_name" right="#frag_w"/>
<eq left="vecsize" right="#none"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="varying_name" right="#frag_z"/>
<eq left="vecsize" right="#none"/>
<eq left="update" right="#clobber"/>
<neq left="sample" right="#explicit"/>
<neq left="register_format" right="#auto"/>
</and>
</derived>
<derived start="19" size="1">
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#f16"/>
</derived>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
<encoding mask="0xfc3e0" exact="0xcc0a0">
<eq left="register_format" right="#auto"/>
<derived start="3" size="2">
<and>
<eq left="varying_name" right="#point"/>
<eq left="vecsize" right="#v2"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<and>
<eq left="varying_name" right="#frag_w"/>
<eq left="vecsize" right="#none"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="varying_name" right="#frag_z"/>
<eq left="vecsize" right="#none"/>
<eq left="update" right="#clobber"/>
<neq left="sample" right="#explicit"/>
<neq left="register_format" right="#auto"/>
</and>
</derived>
<derived start="10" size="4">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
<reserved/>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#conditional"/>
</and>
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#centroid"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#sample"/>
<eq left="update" right="#clobber"/>
</and>
<and>
<eq left="sample" right="#explicit"/>
<eq left="update" right="#clobber"/>
</and>
<reserved/>
<reserved/>
</derived>
</encoding>
</ins>
<ins name="+LEA_ATTR" staging="w=3" message="attribute">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<encoding mask="0xfc600" exact="0xc0400">
<neq left="register_format" right="#auto"/>
<derived start="11" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xffe00" exact="0xc8400">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LEA_ATTR_IMM" staging="w=3" message="attribute">
<src start="0"/>
<src start="3"/>
<immediate name="attribute_index" start="6" size="4"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<encoding mask="0xfc400" exact="0xc0000">
<neq left="register_format" right="#auto"/>
<derived start="11" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0xc8000">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LEA_ATTR_TEX" staging="w=3" message="attribute">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="register_format" size="4">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
<opt>auto</opt>
</mod>
<encoding mask="0xfc600" exact="0xc0600">
<neq left="register_format" right="#auto"/>
<derived start="11" size="3">
<eq left="register_format" right="#f16"/>
<eq left="register_format" right="#f32"/>
<eq left="register_format" right="#s32"/>
<eq left="register_format" right="#u32"/>
<eq left="register_format" right="#s16"/>
<eq left="register_format" right="#u16"/>
<eq left="register_format" right="#f64"/>
<eq left="register_format" right="#i64"/>
</derived>
</encoding>
<encoding mask="0xffe00" exact="0xc8600">
<eq left="register_format" right="#auto"/>
</encoding>
</ins>
<ins name="+LEA_TEX" staging="w=3" mask="0xff600" exact="0xd6600" message="attribute">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="format" start="11" size="1">
<opt>u16</opt>
<opt>u32</opt>
</mod>
</ins>
<ins name="+LEA_TEX_IMM" staging="w=3" mask="0xff000" exact="0xd6000" message="attribute">
<src start="0"/>
<src start="3"/>
<immediate name="texture_index" start="6" size="5"/>
<mod name="format" start="11" size="1">
<opt>u16</opt>
<opt>u32</opt>
</mod>
</ins>
<ins name="+LOAD.i128" staging="w=4" mask="0xffe00" exact="0x61000" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+LOAD.i16" staging="w=1" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="lane0" size="2" default="h0">
<opt>h0</opt>
<opt>h1</opt>
<opt>w0</opt>
<opt>d0</opt>
</mod>
<mod name="extend" size="2">
<opt>none</opt>
<opt>sext</opt>
<opt>zext</opt>
</mod>
<encoding mask="0xffc00" exact="0x60800">
<and>
<eq left="extend" right="#none"/>
<or>
<eq left="lane0" right="#h0"/>
<eq left="lane0" right="#h1"/>
</or>
</and>
<derived start="9" size="1">
<eq left="lane0" right="#h0"/>
<eq left="lane0" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0x63000">
<and>
<neq left="extend" right="#none"/>
<eq left="lane0" right="#w0"/>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0x61800">
<and>
<neq left="extend" right="#none"/>
<eq left="lane0" right="#d0"/>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
</encoding>
</ins>
<ins name="+LOAD.i24" staging="w=1" mask="0xffe00" exact="0x65000" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+LOAD.i32" staging="w=1" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="lane0" size="1" opt="d0"/>
<mod name="extend" size="2">
<opt>none</opt>
<opt>sext</opt>
<opt>zext</opt>
</mod>
<encoding mask="0xffe00" exact="0x60c00">
<and>
<eq left="extend" right="#none"/>
<eq left="lane0" right="#none"/>
</and>
</encoding>
<encoding mask="0xffc00" exact="0x61c00">
<and>
<neq left="extend" right="#none"/>
<eq left="lane0" right="#d0"/>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
</encoding>
</ins>
<ins name="+LOAD.i48" staging="w=2" mask="0xffe00" exact="0x65200" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+LOAD.i64" staging="w=2" mask="0xffe00" exact="0x60e00" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+LOAD.i8" staging="w=1" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="lane0" size="3" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
<opt>h0</opt>
<opt>h1</opt>
<opt>w0</opt>
<opt>d0</opt>
</mod>
<mod name="extend" size="2">
<opt>none</opt>
<opt>sext</opt>
<opt>zext</opt>
</mod>
<encoding mask="0xff800" exact="0x60000">
<and>
<eq left="extend" right="#none"/>
<or>
<eq left="lane0" right="#b0"/>
<eq left="lane0" right="#b1"/>
<eq left="lane0" right="#b2"/>
<eq left="lane0" right="#b3"/>
</or>
</and>
<derived start="9" size="2">
<eq left="lane0" right="#b0"/>
<eq left="lane0" right="#b1"/>
<eq left="lane0" right="#b2"/>
<eq left="lane0" right="#b3"/>
</derived>
</encoding>
<encoding mask="0xff800" exact="0x63800">
<and>
<neq left="extend" right="#none"/>
<or>
<eq left="lane0" right="#h0"/>
<eq left="lane0" right="#h1"/>
</or>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
<derived start="10" size="1">
<eq left="lane0" right="#h0"/>
<eq left="lane0" right="#h1"/>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0x63400">
<and>
<neq left="extend" right="#none"/>
<eq left="lane0" right="#w0"/>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
</encoding>
<encoding mask="0xffc00" exact="0x61400">
<and>
<neq left="extend" right="#none"/>
<eq left="lane0" right="#d0"/>
</and>
<derived start="9" size="1">
<eq left="extend" right="#sext"/>
<eq left="extend" right="#zext"/>
</derived>
</encoding>
</ins>
<ins name="+LOAD.i96" staging="w=3" mask="0xffe00" exact="0x65400" message="load">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<opt>ubo</opt>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+LOGB.f32" mask="0xfffe0" exact="0x3d9a0">
<src start="0"/>
<mod name="widen0" start="3" size="2">
<reserved/>
<opt>none</opt>
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+LOGB.v2f16" mask="0xfffe0" exact="0x3d980">
<src start="0"/>
<mod name="swz0" start="3" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="+MKVEC.v2i16" mask="0xfff00" exact="0x75300">
<src start="0"/>
<src start="3"/>
<mod name="lane0" start="6" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
<mod name="lane1" start="7" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+MOV.i32" mask="0xffff8" exact="0x3d968">
<src start="0"/>
</ins>
<ins name="+MUX.i32" mask="0xff800" exact="0x74000">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="mux" start="9" size="2" default="int_zero">
<opt>neg</opt>
<opt>int_zero</opt>
<opt>fp_zero</opt>
<opt>bit</opt>
</mod>
</ins>
<ins name="+MUX.v2i16" mask="0xfc000" exact="0x70000">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="mux" start="9" size="2" default="int_zero">
<opt>neg</opt>
<opt>int_zero</opt>
<opt>fp_zero</opt>
<opt>bit</opt>
</mod>
<mod name="swap2" start="11" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="swap1" start="12" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
<mod name="swap0" start="13" size="1" default="h01">
<opt>h01</opt>
<opt>h10</opt>
</mod>
</ins>
<ins name="+MUX.v4i8" mask="0xffc00" exact="0x74800">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="mux" start="9" size="1" default="int_zero">
<opt>neg</opt>
<opt>int_zero</opt>
</mod>
</ins>
<ins name="+NOP.i32" mask="0xfffff" exact="0x3d964"/>
<ins name="+QUIET.f32" mask="0xffff8" exact="0x3d970">
<src start="0"/>
</ins>
<ins name="+QUIET.v2f16" mask="0xfffc8" exact="0x3d900">
<src start="0"/>
<mod name="swz0" start="4" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
</ins>
<ins name="+S16_TO_F32" mask="0xfffe8" exact="0x3cce0">
<src start="0"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+S16_TO_S32" mask="0xfffe8" exact="0x3ccc0">
<src start="0"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+S32_TO_F32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0xfffc8" exact="0x3cbc0">
<neq left="round" right="#rtna"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xffff8" exact="0x3cd00">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="+S8_TO_F32" mask="0xfffc8" exact="0x3cb80">
<src start="0"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="+S8_TO_S32" mask="0xfffc8" exact="0x3cb40">
<src start="0"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="+SEG_ADD" mask="0xfff40" exact="0x3d500">
<src start="0"/>
<mod name="seg" start="3" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" start="7" size="1" opt="preserve_null"/>
</ins>
<ins name="+SEG_SUB" mask="0xfff40" exact="0x3d540" unused="true">
<src start="0"/>
<mod name="seg" start="3" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" start="7" size="1" opt="preserve_null"/>
</ins>
<ins name="+SHADDXH.i32" mask="0xfffc0" exact="0x3f8c0">
<src start="0"/>
<src start="3"/>
</ins>
<ins name="+SHIFT_DOUBLE.i32" mask="0xffe00" exact="0xefe00">
<src start="0"/>
<src start="3"/>
<src start="6"/>
</ins>
<ins name="+STORE.i128" staging="r=4" mask="0xffe00" exact="0x61200" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i16" staging="r=1" mask="0xffe00" exact="0x62800" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i24" staging="r=1" mask="0xffe00" exact="0x65800" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i32" staging="r=1" mask="0xffe00" exact="0x62c00" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i48" staging="r=2" mask="0xffe00" exact="0x65a00" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i64" staging="r=2" mask="0xffe00" exact="0x62e00" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i8" staging="r=1" mask="0xffe00" exact="0x62000" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+STORE.i96" staging="r=3" mask="0xffe00" exact="0x65c00" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<mod name="seg" start="6" size="3">
<reserved/>
<opt>none</opt>
<opt>wls</opt>
<opt>stream</opt>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
</ins>
<ins name="+ST_CVT" staging="r=format" mask="0xff800" exact="0xc9800" message="store" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="register_format" size="4" pseudo="true">
<opt>f16</opt>
<opt>f32</opt>
<opt>s32</opt>
<opt>u32</opt>
<opt>s16</opt>
<opt>u16</opt>
<opt>f64</opt>
<opt>i64</opt>
</mod>
<mod name="vecsize" start="9" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
</ins>
<ins name="+ST_TILE" staging="r=vecsize" mask="0xff800" exact="0xcb800" message="tile" dests="0">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="vecsize" start="9" size="2">
<opt>none</opt>
<opt>v2</opt>
<opt>v3</opt>
<opt>v4</opt>
</mod>
</ins>
<ins name="+SWZ.v2i16" mask="0xfffc8" exact="0x3d948">
<src start="0"/>
<mod name="swz0" start="4" size="2">
<opt>h00</opt>
<opt>h10</opt>
<reserved/>
<opt>h11</opt>
</mod>
</ins>
<ins name="+SWZ.v4i8" mask="0xfffc0" exact="0x3df40">
<src start="0"/>
<mod name="swz0" start="3" size="3">
<opt>b0000</opt>
<opt>b1111</opt>
<opt>b2222</opt>
<opt>b3333</opt>
<opt>b0011</opt>
<opt>b2233</opt>
<opt>b1032</opt>
<opt>b3210</opt>
</mod>
</ins>
<ins name="+TEXC" staging="rw=sr_count" mask="0xffc00" exact="0xd7000" message="tex">
<src start="0"/>
<src start="3"/>
<src start="6" mask="0xf7"/>
<mod name="skip" start="9" size="1" opt="skip"/>
<!-- not actually encoded, but used for IR -->
<immediate name="sr_count" size="4" pseudo="true"/>
</ins>
<ins name="+TEXS_2D.f16" staging="w=2" mask="0xfc000" exact="0xd8000" message="tex">
<src start="0"/>
<src start="3"/>
<immediate name="texture_index" start="6" size="3"/>
<immediate name="sampler_index" start="10" size="3"/>
<mod name="skip" start="9" size="1" opt="skip"/>
<mod name="lod_mode" start="13" size="1" default="zero_lod">
<opt>computed_lod</opt>
<opt>zero_lod</opt>
</mod>
</ins>
<ins name="+TEXS_2D.f32" staging="w=4" mask="0xfc000" exact="0x58000" message="tex">
<src start="0"/>
<src start="3"/>
<immediate name="texture_index" start="6" size="3"/>
<immediate name="sampler_index" start="10" size="3"/>
<mod name="skip" start="9" size="1" opt="skip"/>
<mod name="lod_mode" start="13" size="1" default="zero_lod">
<opt>computed_lod</opt>
<opt>zero_lod</opt>
</mod>
</ins>
<ins name="+TEXS_CUBE.f16" staging="w=2" mask="0xfc000" exact="0xdc000" message="tex">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<immediate name="sampler_index" start="10" size="2"/>
<immediate name="texture_index" start="12" size="2"/>
<mod name="skip" start="9" size="1" opt="skip"/>
</ins>
<ins name="+TEXS_CUBE.f32" staging="w=4" mask="0xfc000" exact="0x5c000" message="tex">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<immediate name="sampler_index" start="10" size="2"/>
<immediate name="texture_index" start="12" size="2"/>
<mod name="skip" start="9" size="1" opt="skip"/>
</ins>
<ins name="+U16_TO_F32" mask="0xfffe8" exact="0x3cce8">
<src start="0"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+U16_TO_U32" mask="0xfffe8" exact="0x3ccc8">
<src start="0"/>
<mod name="lane0" start="4" size="1" default="h0">
<opt>h0</opt>
<opt>h1</opt>
</mod>
</ins>
<ins name="+U32_TO_F32">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<encoding mask="0xfffc8" exact="0x3cbc8">
<neq left="round" right="#rtna"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xffff8" exact="0x3cd08">
<eq left="round" right="#rtna"/>
</encoding>
</ins>
<ins name="+U8_TO_F32" mask="0xfffc8" exact="0x3cb88">
<src start="0"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="+U8_TO_U32" mask="0xfffc8" exact="0x3cb48">
<src start="0"/>
<mod name="lane0" start="4" size="2" default="b0">
<opt>b0</opt>
<opt>b1</opt>
<opt>b2</opt>
<opt>b3</opt>
</mod>
</ins>
<ins name="+V2F16_TO_V2S16">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="swz0" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0xfff08" exact="0x3c200">
<neq left="round" right="#rtna"/>
<copy name="swz0" start="6"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffc8" exact="0x3ca80">
<eq left="round" right="#rtna"/>
<copy name="swz0" start="4"/>
</encoding>
</ins>
<ins name="+V2F16_TO_V2U16">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="swz0" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0xfff08" exact="0x3c208">
<neq left="round" right="#rtna"/>
<copy name="swz0" start="6"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffc8" exact="0x3ca88">
<eq left="round" right="#rtna"/>
<copy name="swz0" start="4"/>
</encoding>
</ins>
<ins name="+V2F32_TO_V2F16" mask="0xfe000" exact="0x76000">
<src start="0"/>
<src start="3"/>
<mod name="abs0" size="1" opt="abs"/>
<mod name="abs1" size="1" opt="abs"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="clamp" start="8" size="2">
<opt>none</opt>
<opt>clamp_0_inf</opt>
<opt>clamp_m1_1</opt>
<opt>clamp_0_1</opt>
</mod>
<mod name="round" start="10" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<derived start="6" size="1">
<and>
<eq left="abs0" right="#none"/>
<eq left="abs1" right="#none"/>
</and>
<and>
<eq left="abs0" right="#abs"/>
<eq left="abs1" right="#abs"/>
</and>
</derived>
<derived start="7" size="1">
<and>
<eq left="neg0" right="#none"/>
<eq left="neg1" right="#none"/>
</and>
<and>
<eq left="neg0" right="#neg"/>
<eq left="neg1" right="#neg"/>
</and>
</derived>
</ins>
<ins name="+V2S16_TO_V2F16">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="swz0" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0xfff08" exact="0x3c600">
<neq left="round" right="#rtna"/>
<copy name="swz0" start="6"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffc8" exact="0x3cb00">
<eq left="round" right="#rtna"/>
<copy name="swz0" start="4"/>
</encoding>
</ins>
<ins name="+V2S8_TO_V2F16" mask="0xfff08" exact="0x3c800">
<src start="0"/>
<mod name="swz0" start="4" size="4" default="b01">
<opt>b00</opt>
<opt>b10</opt>
<opt>b20</opt>
<opt>b30</opt>
<opt>b01</opt>
<opt>b11</opt>
<opt>b21</opt>
<opt>b31</opt>
<opt>b02</opt>
<opt>b12</opt>
<opt>b22</opt>
<opt>b32</opt>
<opt>b03</opt>
<opt>b13</opt>
<opt>b23</opt>
<opt>b33</opt>
</mod>
</ins>
<ins name="+V2S8_TO_V2S16" mask="0xfff08" exact="0x3c700">
<src start="0"/>
<mod name="swz0" start="4" size="4" default="b01">
<opt>b00</opt>
<opt>b10</opt>
<opt>b20</opt>
<opt>b30</opt>
<opt>b01</opt>
<opt>b11</opt>
<opt>b21</opt>
<opt>b31</opt>
<opt>b02</opt>
<opt>b12</opt>
<opt>b22</opt>
<opt>b32</opt>
<opt>b03</opt>
<opt>b13</opt>
<opt>b23</opt>
<opt>b33</opt>
</mod>
</ins>
<ins name="+V2U16_TO_V2F16">
<src start="0"/>
<mod name="round" size="3">
<opt>none</opt>
<opt>rtp</opt>
<opt>rtn</opt>
<opt>rtz</opt>
<opt>rtna</opt>
</mod>
<mod name="swz0" size="2" default="h01">
<opt>h00</opt>
<opt>h10</opt>
<opt>h01</opt>
<opt>h11</opt>
</mod>
<encoding mask="0xfff08" exact="0x3c608">
<neq left="round" right="#rtna"/>
<copy name="swz0" start="6"/>
<derived start="4" size="2">
<eq left="round" right="#none"/>
<eq left="round" right="#rtp"/>
<eq left="round" right="#rtn"/>
<eq left="round" right="#rtz"/>
</derived>
</encoding>
<encoding mask="0xfffc8" exact="0x3cb08">
<eq left="round" right="#rtna"/>
<copy name="swz0" start="4"/>
</encoding>
</ins>
<ins name="+V2U8_TO_V2F16" mask="0xfff08" exact="0x3c808">
<src start="0"/>
<mod name="swz0" start="4" size="4" default="b01">
<opt>b00</opt>
<opt>b10</opt>
<opt>b20</opt>
<opt>b30</opt>
<opt>b01</opt>
<opt>b11</opt>
<opt>b21</opt>
<opt>b31</opt>
<opt>b02</opt>
<opt>b12</opt>
<opt>b22</opt>
<opt>b32</opt>
<opt>b03</opt>
<opt>b13</opt>
<opt>b23</opt>
<opt>b33</opt>
</mod>
</ins>
<ins name="+V2U8_TO_V2U16" mask="0xfff08" exact="0x3c708">
<src start="0"/>
<mod name="swz0" start="4" size="4" default="b01">
<opt>b00</opt>
<opt>b10</opt>
<opt>b20</opt>
<opt>b30</opt>
<opt>b01</opt>
<opt>b11</opt>
<opt>b21</opt>
<opt>b31</opt>
<opt>b02</opt>
<opt>b12</opt>
<opt>b22</opt>
<opt>b32</opt>
<opt>b03</opt>
<opt>b13</opt>
<opt>b23</opt>
<opt>b33</opt>
</mod>
</ins>
<ins name="+VAR_TEX.f16" staging="w=2" mask="0xffd00" exact="0xca100" message="vartex">
<immediate name="varying_index" start="0" size="3"/>
<immediate name="texture_index" start="3" size="2"/>
<mod name="update" size="1">
<opt>store</opt>
<opt>retrieve</opt>
</mod>
<mod name="skip" start="7" size="1" opt="skip"/>
<mod name="lod_mode" start="9" size="1" default="zero_lod">
<opt>computed_lod</opt>
<opt>zero_lod</opt>
</mod>
<mod name="sample" size="1">
<opt>center</opt>
<opt>none</opt>
</mod>
<derived start="5" size="2">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+VAR_TEX.f32" staging="w=4" mask="0xffd00" exact="0xca000" message="vartex">
<immediate name="varying_index" start="0" size="3"/>
<immediate name="texture_index" start="3" size="2"/>
<mod name="update" size="1">
<opt>store</opt>
<opt>retrieve</opt>
</mod>
<mod name="skip" start="7" size="1" opt="skip"/>
<mod name="lod_mode" start="9" size="1" default="zero_lod">
<opt>computed_lod</opt>
<opt>zero_lod</opt>
</mod>
<mod name="sample" size="1">
<opt>center</opt>
<opt>none</opt>
</mod>
<derived start="5" size="2">
<and>
<eq left="sample" right="#center"/>
<eq left="update" right="#store"/>
</and>
<and>
<eq left="sample" right="#none"/>
<eq left="update" right="#retrieve"/>
</and>
<reserved/>
<reserved/>
</derived>
</ins>
<ins name="+VN_ASST2.f32">
<src start="0"/>
<mod name="scale" size="1" opt="scale"/>
<mod name="neg0" size="1" opt="neg"/>
<encoding mask="0xffff0" exact="0x3df80">
<eq left="scale" right="#none"/>
<copy name="neg0" start="3"/>
</encoding>
<encoding mask="0xfffe8" exact="0x3de80">
<eq left="scale" right="#scale"/>
<copy name="neg0" start="4"/>
</encoding>
</ins>
<ins name="+VN_ASST2.v2f16" mask="0xffff0" exact="0x3dfa0">
<src start="0"/>
<mod name="neg0" start="3" size="1" opt="neg"/>
</ins>
<ins name="+WMASK" mask="0xfffc0" exact="0x3d700">
<src start="0"/>
<immediate name="fill" start="3" size="1"/>
<mod name="subgroup" start="4" size="2">
<opt>subgroup2</opt>
<opt>subgroup4</opt>
<opt>subgroup8</opt>
</mod>
</ins>
<ins name="+ZS_EMIT" staging="w=1" mask="0xff800" exact="0xd7800" message="z_stencil">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="stencil" size="1" opt="stencil"/>
<mod name="z" size="1" opt="z"/>
<derived start="9" size="2">
<reserved/>
<and>
<eq left="stencil" right="#stencil"/>
<eq left="z" right="#none"/>
</and>
<and>
<eq left="stencil" right="#none"/>
<eq left="z" right="#z"/>
</and>
<and>
<eq left="stencil" right="#stencil"/>
<eq left="z" right="#z"/>
</and>
</derived>
</ins>
<!--- Lowered to *SEG_ADD/+SEG_ADD -->
<ins name="+SEG_ADD.i64" pseudo="true">
<src start="0"/>
<src start="3"/>
<mod name="seg" size="3">
<reserved/>
<reserved/>
<opt>wls</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>tl</opt>
</mod>
<mod name="preserve_null" size="1" opt="preserve_null"/>
</ins>
<!-- Scheduler lowered to *ATOM_C.i32/+ATOM_CX -->
<ins name="+PATOM_C.i32" pseudo="true" staging="rw=sr_count" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="atom_opc" start="9" size="4">
<reserved/>
<reserved/>
<opt>aadd</opt>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<reserved/>
<opt>asmin</opt>
<opt>asmax</opt>
<opt>aumin</opt>
<opt>aumax</opt>
<opt>aand</opt>
<opt>aor</opt>
<opt>axor</opt>
</mod>
</ins>
<ins name="+PATOM_C1.i32" pseudo="true" staging="w=sr_count" message="atomic">
<src start="0"/>
<src start="3"/>
<mod name="atom_opc" start="6" size="3">
<opt>ainc</opt>
<opt>adec</opt>
<opt>aumax1</opt>
<opt>asmax1</opt>
<opt>aor1</opt>
</mod>
</ins>
<!-- *CUBEFACE1/+CUBEFACE2 pair, two destinations, scheduler lowered -->
<ins name="+CUBEFACE" pseudo="true" dests="2">
<src start="0"/>
<src start="3"/>
<src start="6"/>
<mod name="neg0" size="1" opt="neg"/>
<mod name="neg1" size="1" opt="neg"/>
<mod name="neg2" size="1" opt="neg"/>
</ins>
</bifrost>