llvm/test/CodeGen/X86/extractps.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
; PR2647

@0 = external dso_local global float, align 16         ; <ptr>:0 [#uses=2]

define internal void @a() nounwind {
; CHECK-LABEL: a:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    rsqrtss %xmm0, %xmm0
; CHECK-NEXT:    movss %xmm0, __unnamed_1
; CHECK-NEXT:    retl
        load float, ptr @0, align 16                ; <float>:1 [#uses=1]
        insertelement <4 x float> undef, float %1, i32 0                ; <<4 x float>>:2 [#uses=1]
        call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 )              ; <<4 x float>>:3 [#uses=1]
        extractelement <4 x float> %3, i32 0            ; <float>:4 [#uses=1]
        store float %4, ptr @0, align 16
        ret void
}
define internal void @b() nounwind {
; CHECK-LABEL: b:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT:    movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
; CHECK-NEXT:    rsqrtss %xmm0, %xmm0
; CHECK-NEXT:    extractps $1, %xmm0, __unnamed_1
; CHECK-NEXT:    retl
        load float, ptr @0, align 16                ; <float>:1 [#uses=1]
        insertelement <4 x float> undef, float %1, i32 1                ; <<4 x float>>:2 [#uses=1]
        call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 )              ; <<4 x float>>:3 [#uses=1]
        extractelement <4 x float> %3, i32 1            ; <float>:4 [#uses=1]
        store float %4, ptr @0, align 16
        ret void
}

declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone