llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=regallocfast -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -passes=regallocfast -o - %s | FileCheck %s

# This would hit "Illegal subregister index for physical register" verifier error since
# tied operands would skip dropping the subregister index.

---
name:   invalid_subreg_index
tracksRegLiveness: true
machineFunctionInfo:
  isEntryFunction: true
body:             |
  bb.0:
    liveins: $vgpr0, $sgpr0

    ; CHECK-LABEL: name: invalid_subreg_index
    ; CHECK: liveins: $vgpr0, $sgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $m0 = COPY renamable $sgpr0
    ; CHECK-NEXT: undef renamable $vgpr1 = V_INTERP_P2_F32 undef $vgpr1, undef $vgpr0, 0, 1, implicit $mode, implicit $m0, implicit $exec, implicit-def dead $vgpr0_vgpr1
    ; CHECK-NEXT: S_ENDPGM 0, implicit killed renamable $sgpr0
    %0:vgpr_32 = COPY $vgpr0
    %1:sgpr_32 = COPY $sgpr0
    $m0 = COPY %1
    undef %2.sub1:vreg_64 = V_INTERP_P2_F32 undef %2.sub1, undef %0:vgpr_32, 0, 1, implicit $mode, implicit $m0, implicit $exec
    S_ENDPGM 0, implicit %1

...