| // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --functions "bar" --version 5 |
| // REQUIRES: amdgpu-registered-target |
| // RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -emit-llvm -fcuda-is-device \ |
| // RUN: -o - %s | FileCheck --check-prefix=AMDGCN --enable-var-scope %s |
| |
| struct Foo { |
| unsigned long long val; |
| // |
| __attribute__((device)) inline Foo() { val = 0; } |
| __attribute__((device)) inline Foo(const Foo &src) { val = src.val; } |
| __attribute__((device)) inline Foo(const volatile Foo &src) { val = src.val; } |
| }; |
| |
| // AMDGCN-LABEL: define dso_local void @_Z3barPK3Foo( |
| // AMDGCN-SAME: ptr addrspace(5) dead_on_unwind noalias writable sret([[STRUCT_FOO:%.*]]) align 8 [[AGG_RESULT:%.*]], ptr noundef [[SRC_PTR:%.*]]) #[[ATTR0:[0-9]+]] { |
| // AMDGCN-NEXT: [[ENTRY:.*:]] |
| // AMDGCN-NEXT: [[RESULT_PTR:%.*]] = alloca ptr addrspace(5), align 4, addrspace(5) |
| // AMDGCN-NEXT: [[SRC_PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) |
| // AMDGCN-NEXT: [[DST:%.*]] = alloca [[UNION_ANON:%.*]], align 8, addrspace(5) |
| // AMDGCN-NEXT: [[RESULT_PTR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RESULT_PTR]] to ptr |
| // AMDGCN-NEXT: [[SRC_PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[SRC_PTR_ADDR]] to ptr |
| // AMDGCN-NEXT: [[AGG_RESULT_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[AGG_RESULT]] to ptr |
| // AMDGCN-NEXT: [[DST_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[DST]] to ptr |
| // AMDGCN-NEXT: store ptr addrspace(5) [[AGG_RESULT]], ptr [[RESULT_PTR_ASCAST]], align 4 |
| // AMDGCN-NEXT: store ptr [[SRC_PTR]], ptr [[SRC_PTR_ADDR_ASCAST]], align 8 |
| // AMDGCN-NEXT: call void @_ZN3FooC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[AGG_RESULT_ASCAST]]) #[[ATTR1:[0-9]+]] |
| // AMDGCN-NEXT: store ptr [[AGG_RESULT_ASCAST]], ptr [[DST_ASCAST]], align 8 |
| // AMDGCN-NEXT: [[TMP0:%.*]] = load ptr, ptr [[SRC_PTR_ADDR_ASCAST]], align 8 |
| // AMDGCN-NEXT: [[VAL:%.*]] = getelementptr inbounds nuw [[STRUCT_FOO]], ptr [[TMP0]], i32 0, i32 0 |
| // AMDGCN-NEXT: [[TMP1:%.*]] = load i64, ptr [[VAL]], align 8 |
| // AMDGCN-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DST_ASCAST]], align 8 |
| // AMDGCN-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[TMP2]], i64 0 |
| // AMDGCN-NEXT: store i64 [[TMP1]], ptr [[ARRAYIDX]], align 8 |
| // AMDGCN-NEXT: ret void |
| // |
| __attribute__((device)) Foo bar(const Foo *const src_ptr) { |
| Foo result; |
| |
| union { |
| Foo* const ptr; |
| unsigned long long * const ptr64; |
| } dst = {&result}; |
| |
| dst.ptr64[0] = src_ptr->val; |
| return result; |
| } |
