|  | # RUN: llc -o - %s -start-after=livedebugvalues -O0 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s | 
|  | # RUN: llc -o - %s -start-after=livedebugvalues  -O0 -mtriple=x86_64-unknown-linux-gnu -filetype=obj \ | 
|  | # RUN:   | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF | 
|  | # | 
|  | # Verify that we have correct debug info for local variables in code | 
|  | # instrumented with AddressSanitizer. | 
|  | # | 
|  | # Generated from the source file test.cc: | 
|  | # int bar(int y) { | 
|  | #   return y + 2; | 
|  | # } | 
|  | # with "clang++ -S -emit-llvm -mllvm -asan-skip-promotable-allocas=0 -fsanitize=address -O0 -g test.cc" | 
|  | # | 
|  | # The address of the (potentially now malloc'ed) alloca ends up | 
|  | # in rdi, after which it is spilled to the stack. We record the | 
|  | # spill OFFSET on the stack for checking the debug info below. | 
|  | # CHECK: #DEBUG_VALUE: bar:y <- [DW_OP_deref] [$rcx+0] | 
|  | # CHECK: movq %rcx, [[OFFSET:[0-9]+]](%rsp) | 
|  | # CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]] | 
|  | # CHECK-NEXT: #DEBUG_VALUE: bar:y <- [DW_OP_plus_uconst [[OFFSET]], DW_OP_deref, DW_OP_deref] | 
|  | # This location should be valid until the end of the function. | 
|  | # | 
|  | # CHECK:        movq    %rbp, %rsp | 
|  | # CHECK-NEXT: [[END_LABEL:.Ltmp[0-9]+]]: | 
|  | # | 
|  | # CHECK: .Ldebug_loc{{[0-9]+}}: | 
|  | # We expect two location ranges for the variable. | 
|  | # | 
|  | # First, its address is stored in %rcx: | 
|  | # CHECK:      .quad .Ltmp0-.Lfunc_begin0 | 
|  | # CHECK-NEXT: .quad [[START_LABEL]]-.Lfunc_begin0 | 
|  | # CHECK: DW_OP_breg2 | 
|  | # DWARF:       DW_TAG_formal_parameter | 
|  | # DWARF:         DW_AT_location | 
|  | # DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_breg2 RCX+0, DW_OP_deref | 
|  | # | 
|  | # Then it's addressed via %rsp: | 
|  | # CHECK:      .quad [[START_LABEL]]-.Lfunc_begin0 | 
|  | # CHECK-NEXT: .quad [[END_LABEL]]-.Lfunc_begin0 | 
|  | # CHECK: DW_OP_breg7 | 
|  | # CHECK-NEXT: [[OFFSET]] | 
|  | # CHECK: DW_OP_deref | 
|  | # DWARF-NEXT:      [{{.*}}, {{.*}}): DW_OP_breg7 RSP+{{[0-9]+}}, DW_OP_deref, DW_OP_deref) | 
|  | --- | | 
|  | @__asan_option_detect_stack_use_after_return = external global i32 | 
|  | @___asan_gen_ = private unnamed_addr constant [16 x i8] c"1 32 4 6 y.addr\00", align 1 | 
|  |  | 
|  | ; Function Attrs: nounwind sanitize_address uwtable | 
|  | define i32 @_Z3bari(i32 %y) #0 !dbg !6 { | 
|  | entry: | 
|  | %MyAlloca = alloca [64 x i8], align 32 | 
|  | %0 = ptrtoint ptr %MyAlloca to i64 | 
|  | %1 = load i32, ptr @__asan_option_detect_stack_use_after_return | 
|  | %2 = icmp ne i32 %1, 0 | 
|  | br i1 %2, label %3, label %5 | 
|  |  | 
|  | ; <label>:3:                                      ; preds = %entry | 
|  | %4 = call i64 @__asan_stack_malloc_0(i64 64, i64 %0) | 
|  | br label %5 | 
|  |  | 
|  | ; <label>:5:                                      ; preds = %3, %entry | 
|  | %6 = phi i64 [ %0, %entry ], [ %4, %3 ] | 
|  | %7 = add i64 %6, 32 | 
|  | %8 = inttoptr i64 %7 to ptr | 
|  | %9 = inttoptr i64 %6 to ptr | 
|  | store i64 1102416563, ptr %9 | 
|  | %10 = add i64 %6, 8 | 
|  | %11 = inttoptr i64 %10 to ptr | 
|  | store i64 ptrtoint (ptr @___asan_gen_ to i64), ptr %11 | 
|  | %12 = add i64 %6, 16 | 
|  | %13 = inttoptr i64 %12 to ptr | 
|  | store i64 ptrtoint (ptr @_Z3bari to i64), ptr %13 | 
|  | %14 = lshr i64 %6, 3 | 
|  | %15 = add i64 %14, 2147450880 | 
|  | %16 = add i64 %15, 0 | 
|  | %17 = inttoptr i64 %16 to ptr | 
|  | store i64 -868083100587789839, ptr %17 | 
|  | %18 = ptrtoint ptr %8 to i64 | 
|  | %19 = lshr i64 %18, 3 | 
|  | %20 = add i64 %19, 2147450880 | 
|  | %21 = inttoptr i64 %20 to ptr | 
|  | %22 = load i8, ptr %21 | 
|  | %23 = icmp ne i8 %22, 0 | 
|  | call void @llvm.dbg.declare(metadata ptr %8, metadata !10, metadata !DIExpression(DW_OP_deref)), !dbg !11 | 
|  | br i1 %23, label %24, label %30 | 
|  |  | 
|  | ; <label>:24:                                     ; preds = %5 | 
|  | %25 = and i64 %18, 7 | 
|  | %26 = add i64 %25, 3 | 
|  | %27 = trunc i64 %26 to i8 | 
|  | %28 = icmp sge i8 %27, %22 | 
|  | br i1 %28, label %29, label %30 | 
|  |  | 
|  | ; <label>:29:                                     ; preds = %24 | 
|  | call void @__asan_report_store4(i64 %18) | 
|  | call void asm sideeffect "", ""() | 
|  | unreachable | 
|  |  | 
|  | ; <label>:30:                                     ; preds = %24, %5 | 
|  | store i32 %y, ptr %8, align 4 | 
|  | %31 = ptrtoint ptr %8 to i64, !dbg !12 | 
|  | %32 = lshr i64 %31, 3, !dbg !12 | 
|  | %33 = add i64 %32, 2147450880, !dbg !12 | 
|  | %34 = inttoptr i64 %33 to ptr, !dbg !12 | 
|  | %35 = load i8, ptr %34, !dbg !12 | 
|  | %36 = icmp ne i8 %35, 0, !dbg !12 | 
|  | br i1 %36, label %37, label %43, !dbg !12 | 
|  |  | 
|  | ; <label>:37:                                     ; preds = %30 | 
|  | %38 = and i64 %31, 7, !dbg !12 | 
|  | %39 = add i64 %38, 3, !dbg !12 | 
|  | %40 = trunc i64 %39 to i8, !dbg !12 | 
|  | %41 = icmp sge i8 %40, %35, !dbg !12 | 
|  | br i1 %41, label %42, label %43 | 
|  |  | 
|  | ; <label>:42:                                     ; preds = %37 | 
|  | call void @__asan_report_load4(i64 %31), !dbg !12 | 
|  | call void asm sideeffect "", ""() | 
|  | unreachable | 
|  |  | 
|  | ; <label>:43:                                     ; preds = %37, %30 | 
|  | %44 = load i32, ptr %8, align 4, !dbg !12 | 
|  | %add = add nsw i32 %44, 2, !dbg !12 | 
|  | store i64 1172321806, ptr %9, !dbg !12 | 
|  | %45 = icmp ne i64 %6, %0, !dbg !12 | 
|  | br i1 %45, label %46, label %53, !dbg !12 | 
|  |  | 
|  | ; <label>:46:                                     ; preds = %43 | 
|  | %47 = add i64 %15, 0, !dbg !12 | 
|  | %48 = inttoptr i64 %47 to ptr, !dbg !12 | 
|  | store i64 -723401728380766731, ptr %48, !dbg !12 | 
|  | %49 = add i64 %6, 56, !dbg !12 | 
|  | %50 = inttoptr i64 %49 to ptr, !dbg !12 | 
|  | %51 = load i64, ptr %50, !dbg !12 | 
|  | %52 = inttoptr i64 %51 to ptr, !dbg !12 | 
|  | store i8 0, ptr %52, !dbg !12 | 
|  | br label %56, !dbg !12 | 
|  |  | 
|  | ; <label>:53:                                     ; preds = %43 | 
|  | %54 = add i64 %15, 0, !dbg !12 | 
|  | %55 = inttoptr i64 %54 to ptr, !dbg !12 | 
|  | store i64 0, ptr %55, !dbg !12 | 
|  | br label %56, !dbg !12 | 
|  |  | 
|  | ; <label>:56:                                     ; preds = %53, %46 | 
|  | ret i32 %add, !dbg !12 | 
|  | } | 
|  |  | 
|  | ; Function Attrs: nounwind readnone speculatable | 
|  | declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 | 
|  |  | 
|  | declare void @__asan_init_v3() | 
|  |  | 
|  | declare void @__asan_report_load4(i64) | 
|  |  | 
|  | declare void @__asan_report_store4(i64) | 
|  |  | 
|  | declare i64 @__asan_stack_malloc_0(i64, i64) | 
|  |  | 
|  | ; Function Attrs: nounwind | 
|  | declare void @llvm.stackprotector(ptr, ptr) #2 | 
|  |  | 
|  | attributes #0 = { nounwind sanitize_address uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } | 
|  | attributes #1 = { nounwind readnone speculatable } | 
|  | attributes #2 = { nounwind } | 
|  |  | 
|  | !llvm.dbg.cu = !{!0} | 
|  | !llvm.module.flags = !{!3, !4} | 
|  | !llvm.ident = !{!5} | 
|  |  | 
|  | !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.5.0 (209308)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2) | 
|  | !1 = !DIFile(filename: "test.cc", directory: "/llvm_cmake_gcc") | 
|  | !2 = !{} | 
|  | !3 = !{i32 2, !"Dwarf Version", i32 4} | 
|  | !4 = !{i32 2, !"Debug Info Version", i32 3} | 
|  | !5 = !{!"clang version 3.5.0 (209308)"} | 
|  | !6 = distinct !DISubprogram(name: "bar", linkageName: "_Z3bari", scope: !1, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2) | 
|  | !7 = !DISubroutineType(types: !8) | 
|  | !8 = !{!9, !9} | 
|  | !9 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed) | 
|  | !10 = !DILocalVariable(name: "y", arg: 1, scope: !6, file: !1, line: 1, type: !9) | 
|  | !11 = !DILocation(line: 0, scope: !6) | 
|  | !12 = !DILocation(line: 2, scope: !6) | 
|  |  | 
|  | ... | 
|  | --- | 
|  | name:            _Z3bari | 
|  | alignment:       16 | 
|  | tracksRegLiveness: true | 
|  | liveins: | 
|  | - { reg: '$edi' } | 
|  | frameInfo: | 
|  | stackSize:       152 | 
|  | offsetAdjustment: -160 | 
|  | maxAlignment:    32 | 
|  | adjustsStack:    true | 
|  | hasCalls:        true | 
|  | maxCallFrameSize: 0 | 
|  | fixedStack: | 
|  | - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default } | 
|  | stack: | 
|  | - { id: 0, name: MyAlloca, offset: -96, size: 64, alignment: 32, stack-id: default } | 
|  | - { id: 1, type: spill-slot, offset: -100, size: 4, alignment: 4, stack-id: default } | 
|  | - { id: 2, type: spill-slot, offset: -112, size: 8, alignment: 8, stack-id: default } | 
|  | - { id: 3, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: default } | 
|  | - { id: 4, type: spill-slot, offset: -128, size: 8, alignment: 8, stack-id: default } | 
|  | - { id: 5, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: default } | 
|  | - { id: 6, type: spill-slot, offset: -144, size: 8, alignment: 8, stack-id: default } | 
|  | - { id: 7, type: spill-slot, offset: -145, size: 1, alignment: 1, stack-id: default } | 
|  | - { id: 8, type: spill-slot, offset: -146, size: 1, alignment: 1, stack-id: default } | 
|  | - { id: 9, type: spill-slot, offset: -152, size: 4, alignment: 4, stack-id: default } | 
|  | body:             | | 
|  | bb.0.entry: | 
|  | liveins: $edi | 
|  |  | 
|  | frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp | 
|  | CFI_INSTRUCTION def_cfa_offset 16 | 
|  | CFI_INSTRUCTION offset $rbp, -16 | 
|  | $rbp = frame-setup MOV64rr $rsp | 
|  | CFI_INSTRUCTION def_cfa_register $rbp | 
|  | $rsp = frame-setup AND64ri8 $rsp, -32, implicit-def dead $eflags | 
|  | $rsp = frame-setup SUB64ri32 $rsp, 160, implicit-def dead $eflags | 
|  | renamable $rax = LEA64r $rsp, 1, $noreg, 64, $noreg | 
|  | CMP32mi $noreg, 1, $noreg, @__asan_option_detect_stack_use_after_return, $noreg, 0, implicit-def $eflags :: (load (s32) from @__asan_option_detect_stack_use_after_return) | 
|  | $rcx = MOV64rr $rax | 
|  | MOV32mr $rsp, 1, $noreg, 60, $noreg, killed $edi :: (store (s32) into %stack.1) | 
|  | MOV64mr $rsp, 1, $noreg, 48, $noreg, killed $rax :: (store (s64) into %stack.2) | 
|  | MOV64mr $rsp, 1, $noreg, 40, $noreg, killed $rcx :: (store (s64) into %stack.3) | 
|  | JCC_1 %bb.2, 4, implicit $eflags | 
|  |  | 
|  | bb.1 (%ir-block.3): | 
|  | $edi = MOV32ri 64, implicit-def $rdi | 
|  | $rsi = MOV64rm $rsp, 1, $noreg, 48, $noreg :: (load (s64) from %stack.2) | 
|  | CALL64pcrel32 @__asan_stack_malloc_0, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit killed $rsi, implicit-def $rax | 
|  | MOV64mr $rsp, 1, $noreg, 40, $noreg, killed $rax :: (store (s64) into %stack.3) | 
|  |  | 
|  | bb.2 (%ir-block.5): | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 40, $noreg :: (load (s64) from %stack.3) | 
|  | $rcx = MOV64rr $rax | 
|  | renamable $rcx = ADD64ri8 renamable $rcx, 32, implicit-def $eflags | 
|  | MOV64mi32 renamable $rax, 1, $noreg, 0, $noreg, 1102416563 :: (store (s64) into %ir.9) | 
|  | renamable $rdx = MOV64ri @___asan_gen_ | 
|  | MOV64mr renamable $rax, 1, $noreg, 8, $noreg, killed renamable $rdx :: (store (s64) into %ir.11) | 
|  | renamable $rdx = MOV64ri @_Z3bari | 
|  | MOV64mr renamable $rax, 1, $noreg, 16, $noreg, killed renamable $rdx :: (store (s64) into %ir.13) | 
|  | $rdx = MOV64rr $rax | 
|  | renamable $rdx = SHR64ri renamable $rdx, 3, implicit-def $eflags | 
|  | $rsi = MOV64rr $rdx | 
|  | renamable $rsi = ADD64ri32 renamable $rsi, 2147450880, implicit-def $eflags | 
|  | renamable $rdi = MOV64ri -868083100587789839 | 
|  | MOV64mr killed renamable $rdx, 1, $noreg, 2147450880, $noreg, killed renamable $rdi :: (store (s64) into %ir.17) | 
|  | $rdx = MOV64rr $rcx | 
|  | renamable $rdx = SHR64ri renamable $rdx, 3, implicit-def $eflags | 
|  | renamable $r8b = MOV8rm killed renamable $rdx, 1, $noreg, 2147450880, $noreg :: (load (s8) from %ir.21) | 
|  | DBG_VALUE renamable $rcx, 0, !10, !DIExpression(DW_OP_deref), debug-location !11 | 
|  | CMP8ri renamable $r8b, 0, implicit-def $eflags | 
|  | MOV64mr $rsp, 1, $noreg, 32, $noreg, killed $rax :: (store (s64) into %stack.4) | 
|  | MOV64mr $rsp, 1, $noreg, 24, $noreg, killed $rcx :: (store (s64) into %stack.5) | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | MOV64mr $rsp, 1, $noreg, 16, $noreg, killed $rsi :: (store (s64) into %stack.6) | 
|  | MOV8mr $rsp, 1, $noreg, 15, $noreg, killed $r8b :: (store (s8) into %stack.7) | 
|  | JCC_1 %bb.5, 4, implicit $eflags | 
|  |  | 
|  | bb.3 (%ir-block.24): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | renamable $rax = AND64ri8 renamable $rax, 7, implicit-def $eflags | 
|  | renamable $rax = ADD64ri8 renamable $rax, 3, implicit-def $eflags | 
|  | $cl = MOV8rr $al, implicit killed $rax | 
|  | $dl = MOV8rm $rsp, 1, $noreg, 15, $noreg :: (load (s8) from %stack.7) | 
|  | CMP8rr killed renamable $cl, killed renamable $dl, implicit-def $eflags | 
|  | JCC_1 %bb.5, 12, implicit $eflags | 
|  |  | 
|  | bb.4 (%ir-block.29): | 
|  | successors: | 
|  |  | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rdi = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | CALL64pcrel32 @__asan_report_store4, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi | 
|  | INLINEASM &"", 1 | 
|  |  | 
|  | bb.5 (%ir-block.30): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | $ecx = MOV32rm $rsp, 1, $noreg, 60, $noreg :: (load (s32) from %stack.1) | 
|  | MOV32mr renamable $rax, 1, $noreg, 0, $noreg, killed renamable $ecx :: (store (s32) into %ir.8) | 
|  | renamable $rax = SHR64ri renamable $rax, 3, implicit-def $eflags, debug-location !12 | 
|  | renamable $dl = MOV8rm killed renamable $rax, 1, $noreg, 2147450880, $noreg, debug-location !12 :: (load (s8) from %ir.34) | 
|  | CMP8ri renamable $dl, 0, implicit-def $eflags, debug-location !12 | 
|  | MOV8mr $rsp, 1, $noreg, 14, $noreg, killed $dl :: (store (s8) into %stack.8) | 
|  | JCC_1 %bb.8, 4, implicit $eflags, debug-location !12 | 
|  |  | 
|  | bb.6 (%ir-block.37): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | renamable $rax = AND64ri8 renamable $rax, 7, implicit-def $eflags, debug-location !12 | 
|  | renamable $rax = ADD64ri8 renamable $rax, 3, implicit-def $eflags, debug-location !12 | 
|  | $cl = MOV8rr $al, implicit killed $rax, debug-location !12 | 
|  | $dl = MOV8rm $rsp, 1, $noreg, 14, $noreg :: (load (s8) from %stack.8) | 
|  | CMP8rr killed renamable $cl, killed renamable $dl, implicit-def $eflags, debug-location !12 | 
|  | JCC_1 %bb.8, 12, implicit $eflags | 
|  |  | 
|  | bb.7 (%ir-block.42): | 
|  | successors: | 
|  |  | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rdi = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | CALL64pcrel32 @__asan_report_load4, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, debug-location !12 | 
|  | INLINEASM &"", 1 | 
|  |  | 
|  | bb.8 (%ir-block.43): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 24, $noreg :: (load (s64) from %stack.5) | 
|  | renamable $ecx = MOV32rm killed renamable $rax, 1, $noreg, 0, $noreg, debug-location !12 :: (load (s32) from %ir.8) | 
|  | renamable $ecx = ADD32ri8 renamable $ecx, 2, implicit-def $eflags, debug-location !12 | 
|  | $rdx = MOV64rm $rsp, 1, $noreg, 32, $noreg :: (load (s64) from %stack.4) | 
|  | MOV64mi32 renamable $rdx, 1, $noreg, 0, $noreg, 1172321806, debug-location !12 :: (store (s64) into %ir.9) | 
|  | $rsi = MOV64rm $rsp, 1, $noreg, 48, $noreg :: (load (s64) from %stack.2) | 
|  | CMP64rr killed renamable $rdx, killed renamable $rsi, implicit-def $eflags, debug-location !12 | 
|  | MOV32mr $rsp, 1, $noreg, 8, $noreg, killed $ecx :: (store (s32) into %stack.9) | 
|  | JCC_1 %bb.10, 4, implicit $eflags, debug-location !12 | 
|  |  | 
|  | bb.9 (%ir-block.46): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | renamable $rax = MOV64ri -723401728380766731, debug-location !12 | 
|  | $rcx = MOV64rm $rsp, 1, $noreg, 16, $noreg :: (load (s64) from %stack.6) | 
|  | MOV64mr killed renamable $rcx, 1, $noreg, 0, $noreg, killed renamable $rax, debug-location !12 :: (store (s64) into %ir.48) | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 32, $noreg :: (load (s64) from %stack.4) | 
|  | renamable $rdx = MOV64rm killed renamable $rax, 1, $noreg, 56, $noreg, debug-location !12 :: (load (s64) from %ir.50) | 
|  | MOV8mi killed renamable $rdx, 1, $noreg, 0, $noreg, 0, debug-location !12 :: (store (s8) into %ir.52) | 
|  | JMP_1 %bb.11, debug-location !12 | 
|  |  | 
|  | bb.10 (%ir-block.53): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $rax = MOV64rm $rsp, 1, $noreg, 16, $noreg :: (load (s64) from %stack.6) | 
|  | MOV64mi32 killed renamable $rax, 1, $noreg, 0, $noreg, 0, debug-location !12 :: (store (s64) into %ir.55) | 
|  |  | 
|  | bb.11 (%ir-block.56): | 
|  | DBG_VALUE $rsp, 0, !10, !DIExpression(DW_OP_plus_uconst, 24, DW_OP_deref, DW_OP_deref), debug-location !11 | 
|  | $eax = MOV32rm $rsp, 1, $noreg, 8, $noreg :: (load (s32) from %stack.9) | 
|  | $rsp = MOV64rr $rbp, debug-location !12 | 
|  | $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !12 | 
|  | CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !12 | 
|  | RET64 implicit killed $eax, debug-location !12 | 
|  |  | 
|  | ... |