llvm/test/CodeGen/RISCV/make-compressible-zbc-zhinx.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -o - %s -mtriple=riscv32 -mattr=+zcb,+zhinx -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s
# RUN: llc -o - %s -mtriple=riscv64 -mattr=+zcb,+zhinx -simplify-mir \
# RUN:   -run-pass=riscv-make-compressible | FileCheck --check-prefixes=CHECK %s

--- |
  define void @store_common_value_half(ptr %a, ptr %b, ptr %c) #0 {
  entry:
    store half 0.0, ptr %a, align 2
    store half 0.0, ptr %b, align 2
    store half 0.0, ptr %c, align 2
    ret void
  }

  define void @store_common_ptr_half(ptr %p) #0 {
  entry:
    store volatile half 2.0, ptr %p, align 2
    store volatile half 32.0, ptr %p, align 2
    store volatile half 512.0, ptr %p, align 2
    ret void
  }

  define void @load_common_ptr_half(ptr %p) #0 {
  entry:
    %0 = load volatile half, ptr %p, align 2
    %1 = load volatile half, ptr %p, align 2
    %2 = load volatile half, ptr %p, align 2
    ret void
  }

  define void @store_large_offset_half(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds half, ptr %p, i32 100
    store volatile half 2.0, ptr %0, align 2
    %1 = getelementptr inbounds half, ptr %p, i32 101
    store volatile half 32.0, ptr %1, align 2
    %2 = getelementptr inbounds half, ptr %p, i32 102
    store volatile half 512.0, ptr %2, align 2
    %3 = getelementptr inbounds half, ptr %p, i32 103
    store volatile half 16384.0, ptr %3, align 2
    ret void
  }

  define void @load_large_offset_half(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds half, ptr %p, i32 100
    %a = load volatile half, ptr %0, align 2
    %1 = getelementptr inbounds half, ptr %p, i32 100
    %b = load volatile half, ptr %1, align 2
    %2 = getelementptr inbounds half, ptr %p, i32 101
    %c = load volatile half, ptr %2, align 2
    %3 = getelementptr inbounds half, ptr %p, i32 101
    %d = load volatile half, ptr %3, align 2
    ret void
  }

  define void @store_large_offset_no_opt_half(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds i8, ptr %p, i8 100
    store volatile half 2.0, ptr %0, align 2
    %1 = getelementptr inbounds i8, ptr %p, i8 101
    store volatile half 32.0, ptr %1, align 2
    %2 = getelementptr inbounds i8, ptr %p, i8 104
    store volatile half 512.0, ptr %2, align 2
    ret void
  }

  define void @load_large_offset_no_opt_half(ptr %p) #0 {
  entry:
    %0 = getelementptr inbounds half, ptr %p, i32 100
    %a = load volatile half, ptr %0, align 2
    %1 = getelementptr inbounds half, ptr %p, i32 101
    %c = load volatile half, ptr %1, align 2
    %2 = getelementptr inbounds half, ptr %p, i32 102
    %d = load volatile half, ptr %2, align 2
    ret void
  }

  attributes #0 = { minsize }

...
---
name:            store_common_value_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10, $x11, $x12

    ; CHECK-LABEL: name: store_common_value_half
    ; CHECK: liveins: $x10, $x11, $x12
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $x13_h = PseudoMV_FPR16INX $x0_h
    ; CHECK-NEXT: SH_INX $x13_h, killed renamable $x10, 0 :: (store (s16) into %ir.a)
    ; CHECK-NEXT: SH_INX $x13_h, killed renamable $x11, 0 :: (store (s16) into %ir.b)
    ; CHECK-NEXT: SH_INX $x13_h, killed renamable $x12, 0 :: (store (s16) into %ir.c)
    ; CHECK-NEXT: PseudoRET
    SH_INX $x0_h, killed renamable $x10, 0 :: (store (s16) into %ir.a)
    SH_INX $x0_h, killed renamable $x11, 0 :: (store (s16) into %ir.b)
    SH_INX $x0_h, killed renamable $x12, 0 :: (store (s16) into %ir.c)
    PseudoRET

...
---
name:            store_common_ptr_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; CHECK-LABEL: name: store_common_ptr_half
    ; CHECK: liveins: $x16
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: renamable $x10 = LUI 4
    ; CHECK-NEXT: $x11 = ADDI $x16, 0
    ; CHECK-NEXT: SH_INX killed renamable $x10_h, $x11, 0 :: (volatile store (s16) into %ir.p)
    ; CHECK-NEXT: renamable $x10 = LUI 5
    ; CHECK-NEXT: SH_INX killed renamable $x10_h, $x11, 0 :: (volatile store (s16) into %ir.p)
    ; CHECK-NEXT: renamable $x10 = LUI 6
    ; CHECK-NEXT: SH_INX killed renamable $x10_h, killed $x11, 0 :: (volatile store (s16) into %ir.p)
    ; CHECK-NEXT: PseudoRET
    renamable $x10 = LUI 4
    SH_INX killed renamable $x10_h, renamable $x16, 0 :: (volatile store (s16) into %ir.p)
    renamable $x10 = LUI 5
    SH_INX killed renamable $x10_h, renamable $x16, 0 :: (volatile store (s16) into %ir.p)
    renamable $x10 = LUI 6
    SH_INX killed renamable $x10_h, killed renamable $x16, 0 :: (volatile store (s16) into %ir.p)
    PseudoRET

...
---
name:            load_common_ptr_half
body:             |
  bb.0.entry:
    liveins: $x16

    ; CHECK-LABEL: name: load_common_ptr_half
    ; CHECK: liveins: $x16
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $x11 = ADDI $x16, 0
    ; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.p)
    ; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.p)
    ; CHECK-NEXT: dead $x10_h = LH_INX killed $x11, 0 :: (volatile load (s16) from %ir.p)
    ; CHECK-NEXT: PseudoRET
    dead $x10_h = LH_INX renamable $x16, 0 :: (volatile load (s16) from %ir.p)
    dead $x10_h = LH_INX renamable $x16, 0 :: (volatile load (s16) from %ir.p)
    dead $x10_h = LH_INX killed renamable $x16, 0 :: (volatile load (s16) from %ir.p)
    PseudoRET

...
---
name:            store_large_offset_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x10
    ; CHECK-LABEL: name: store_large_offset_half
    ; CHECK: liveins: $x10
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: renamable $x11 = LUI 4
    ; CHECK-NEXT: $x12 = ADDI $x10, 200
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 0 :: (volatile store (s16) into %ir.0)
    ; CHECK-NEXT: renamable $x11 = LUI 5
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 0 :: (volatile store (s16) into %ir.1)
    ; CHECK-NEXT: renamable $x11 = LUI 6
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, $x12, 2 :: (volatile store (s16) into %ir.2)
    ; CHECK-NEXT: renamable $x11 = LUI 7
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, killed $x12, 2 :: (volatile store (s16) into %ir.3)
    ; CHECK-NEXT: PseudoRET
    renamable $x11 = LUI 4
    SH_INX killed renamable $x11_h, renamable $x10, 200 :: (volatile store (s16) into %ir.0)
    renamable $x11 = LUI 5
    SH_INX killed renamable $x11_h, renamable $x10, 200 :: (volatile store (s16) into %ir.1)
    renamable $x11 = LUI 6
    SH_INX killed renamable $x11_h, renamable $x10, 202 :: (volatile store (s16) into %ir.2)
    renamable $x11 = LUI 7
    SH_INX killed renamable $x11_h, killed renamable $x10, 202 :: (volatile store (s16) into %ir.3)
    PseudoRET

...
---
name:            load_large_offset_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; CHECK-LABEL: name: load_large_offset_half
    ; CHECK: liveins: $x16
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $x11 = ADDI $x16, 100
    ; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.0)
    ; CHECK-NEXT: dead $x10_h = LH_INX $x11, 0 :: (volatile load (s16) from %ir.1)
    ; CHECK-NEXT: dead $x10_h = LH_INX $x11, 2 :: (volatile load (s16) from %ir.2)
    ; CHECK-NEXT: dead $x10_h = LH_INX killed $x11, 2 :: (volatile load (s16) from %ir.3)
    ; CHECK-NEXT: PseudoRET
    dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s16) from %ir.0)
    dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s16) from %ir.1)
    dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s16) from %ir.2)
    dead $x10_h = LH_INX killed renamable $x16, 102 :: (volatile load (s16) from %ir.3)
    PseudoRET

...
---
name:            store_large_offset_no_opt_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; CHECK-LABEL: name: store_large_offset_no_opt_half
    ; CHECK: liveins: $x16
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: renamable $x11 = LUI 4
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 200 :: (volatile store (s16) into %ir.0)
    ; CHECK-NEXT: renamable $x11 = LUI 5
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 202 :: (volatile store (s16) into %ir.1)
    ; CHECK-NEXT: renamable $x11 = LUI 6
    ; CHECK-NEXT: SH_INX killed renamable $x11_h, renamable $x16, 204 :: (volatile store (s16) into %ir.2)
    ; CHECK-NEXT: PseudoRET
    renamable $x11 = LUI 4
    SH_INX killed renamable $x11_h, renamable $x16, 200 :: (volatile store (s16) into %ir.0)
    renamable $x11 = LUI 5
    SH_INX killed renamable $x11_h, renamable $x16, 202 :: (volatile store (s16) into %ir.1)
    renamable $x11 = LUI 6
    SH_INX killed renamable $x11_h, renamable $x16, 204 :: (volatile store (s16) into %ir.2)
    PseudoRET

...
---
name:            load_large_offset_no_opt_half
tracksRegLiveness: true
body:             |
  bb.0.entry:
    liveins: $x16

    ; CHECK-LABEL: name: load_large_offset_no_opt_half
    ; CHECK: liveins: $x16
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s8) from %ir.0)
    ; CHECK-NEXT: dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s8) from %ir.1)
    ; CHECK-NEXT: dead $x10_h = LH_INX killed renamable $x16, 104 :: (volatile load (s8) from %ir.2)
    ; CHECK-NEXT: PseudoRET
    dead $x10_h = LH_INX renamable $x16, 100 :: (volatile load (s8) from %ir.0)
    dead $x10_h = LH_INX renamable $x16, 102 :: (volatile load (s8) from %ir.1)
    dead $x10_h = LH_INX killed renamable $x16, 104 :: (volatile load (s8) from %ir.2)
    PseudoRET

...