llvm/test/CodeGen/PowerPC/peephole-counter-perOp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# REQUIRES: asserts
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - | FileCheck %s --check-prefix=ALL
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=0-5 \
# RUN:   | FileCheck %s --check-prefix=ALL
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=0-5 \
# RUN:   | FileCheck %s --check-prefix=ALL
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=3 \
# RUN:   | FileCheck %s --check-prefix=ONE-FIRST-RLWINM
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=4 \
# RUN:   | FileCheck %s --check-prefix=ONE-SECOND-RLWINM
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs \
# RUN:   -run-pass ppc-mi-peepholes %s -o - -debug-counter=ppc-per-op-peephole=3-4 \
# RUN:   | FileCheck %s --check-prefix=TWO

---
name: testFoldRLWINM
#CHECK: name: testFoldRLWINM
tracksRegLiveness: true
body: |
  bb.0.entry:
    liveins: $x3
    ; ALL-LABEL: name: testFoldRLWINM
    ; ALL: liveins: $x3
    ; ALL-NEXT: {{  $}}
    ; ALL-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3
    ; ALL-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
    ; ALL-NEXT: dead [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 12
    ; ALL-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 11
    ; ALL-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 10
    ; ALL-NEXT: BLR8 implicit $lr8, implicit $rm
    ;
    ; ONE-FIRST-RLWINM-LABEL: name: testFoldRLWINM
    ; ONE-FIRST-RLWINM: liveins: $x3
    ; ONE-FIRST-RLWINM-NEXT: {{  $}}
    ; ONE-FIRST-RLWINM-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3
    ; ONE-FIRST-RLWINM-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
    ; ONE-FIRST-RLWINM-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31
    ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 12
    ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM [[RLWINM]], 19, 0, 11
    ; ONE-FIRST-RLWINM-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10
    ; ONE-FIRST-RLWINM-NEXT: BLR8 implicit $lr8, implicit $rm
    ;
    ; ONE-SECOND-RLWINM-LABEL: name: testFoldRLWINM
    ; ONE-SECOND-RLWINM: liveins: $x3
    ; ONE-SECOND-RLWINM-NEXT: {{  $}}
    ; ONE-SECOND-RLWINM-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3
    ; ONE-SECOND-RLWINM-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
    ; ONE-SECOND-RLWINM-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31
    ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[RLWINM]], 19, 0, 12
    ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 11
    ; ONE-SECOND-RLWINM-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10
    ; ONE-SECOND-RLWINM-NEXT: BLR8 implicit $lr8, implicit $rm
    ;
    ; TWO-LABEL: name: testFoldRLWINM
    ; TWO: liveins: $x3
    ; TWO-NEXT: {{  $}}
    ; TWO-NEXT: [[COPY:%[0-9]+]]:g8rc = COPY killed $x3
    ; TWO-NEXT: [[COPY1:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
    ; TWO-NEXT: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY1]], 27, 5, 31
    ; TWO-NEXT: dead [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[COPY1]], 14, 0, 12
    ; TWO-NEXT: dead [[RLWINM2:%[0-9]+]]:gprc = RLWINM killed [[COPY1]], 14, 0, 11
    ; TWO-NEXT: dead [[RLWINM3:%[0-9]+]]:gprc = RLWINM killed [[RLWINM]], 19, 0, 10
    ; TWO-NEXT: BLR8 implicit $lr8, implicit $rm
    %0:g8rc = COPY $x3
    %1:gprc = COPY %0.sub_32:g8rc
    %2:gprc = RLWINM %1:gprc, 27, 5, 31
    %3:gprc = RLWINM %2:gprc, 19, 0, 12
    %4:gprc = RLWINM %2:gprc, 19, 0, 11
    %5:gprc = RLWINM %2:gprc, 19, 0, 10
    BLR8 implicit $lr8, implicit $rm
...