llvm/test/CodeGen/X86/pr63692.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s

define void @prefault(ptr noundef %range_start, ptr noundef readnone %range_end) {
; CHECK-LABEL: prefault:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    cmpq %rsi, %rdi
; CHECK-NEXT:    jae .LBB0_3
; CHECK-NEXT:    .p2align 4
; CHECK-NEXT:  .LBB0_1: # %while.body
; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    lock orb $0, (%rdi)
; CHECK-NEXT:    addq $4096, %rdi # imm = 0x1000
; CHECK-NEXT:    cmpq %rsi, %rdi
; CHECK-NEXT:    jb .LBB0_1
; CHECK-NEXT:  .LBB0_3: # %while.end
; CHECK-NEXT:    retq
entry:
  %cmp3 = icmp ult ptr %range_start, %range_end
  br i1 %cmp3, label %while.body, label %while.end

while.body:                                       ; preds = %entry, %while.body
  %start.04 = phi ptr [ %add.ptr, %while.body ], [ %range_start, %entry ]
  %0 = atomicrmw volatile or ptr %start.04, i8 0 monotonic, align 1
  %add.ptr = getelementptr inbounds i8, ptr %start.04, i64 4096
  %cmp = icmp ult ptr %add.ptr, %range_end
  br i1 %cmp, label %while.body, label %while.end

while.end:                                        ; preds = %while.body, %entry
  ret void
}