llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir

# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck -check-prefix=GCN %s

# GCN-LABEL: name: test_part_fold{{$}}
# GCN: %2:sreg_32 = S_ADD_I32 70, %1
---
name: test_part_fold
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 80
    %2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
...

# GCN-LABEL: name: test_inline_const{{$}}
# GCN: %2:sreg_32 = S_ADD_I32 70, 63
---
name: test_inline_const
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 63
    %2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
...
# GCN-LABEL: name: test_obscure{{$}}
# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, %1
---
name: test_obscure
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 80
    %2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
...
# GCN-LABEL: name: test_obscure_inline{{$}}
# GCN: %2:sreg_32 = S_LSHL2_ADD_U32 70, 63
---
name: test_obscure_inline
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 63
    %2:sreg_32 = S_LSHL2_ADD_U32 %0, %1, implicit-def $scc
...
# GCN-LABEL: name: test_frameindex{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 %stack.0, 70
---
name: test_frameindex
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16}
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
...
# GCN-LABEL: name: test_frameindex_inline{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 %stack.0, 63
---
name: test_frameindex_inline
tracksRegLiveness: true
stack:
  - { id: 0, type: default, offset: 0, size: 64, alignment: 16}
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 63
    %1:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def $scc
...

# GCN-LABEL: name: test_no_fold_literal_already_inline_lhs{{$}}
# GCN: %0:sreg_32 = S_MOV_B32 80
# GCN-NEXT: %1:sreg_32 = S_ADD_I32 70, %0
---
name: test_no_fold_literal_already_inline_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    %1:sreg_32 = S_ADD_I32 70, %0, implicit-def $scc
...

# GCN-LABEL: name: test_no_fold_literal_already_inline_rhs{{$}}
# GCN: %0:sreg_32 = S_MOV_B32 80
# GCN-NEXT: %1:sreg_32 = S_ADD_I32 %0, 70
---
name: test_no_fold_literal_already_inline_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    %1:sreg_32 = S_ADD_I32 %0, 70, implicit-def $scc
...

# GCN-LABEL: name: test_fold_literal_inlineimm_lhs{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 64, 80
---
name: test_fold_literal_inlineimm_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    %1:sreg_32 = S_ADD_I32 64, %0, implicit-def $scc
...

# GCN-LABEL: name: test_fold_literal_inlineimm_rhs{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 80, 64
---
name: test_fold_literal_inlineimm_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    %1:sreg_32 = S_ADD_I32 %0, 64, implicit-def $scc
...

# GCN-LABEL: name: test_fold_same_literal_2x{{$}}
# GCN: %2:sreg_32 = S_ADD_I32 70, 70
---
name: test_fold_same_literal_2x
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 70
    %2:sreg_32 = S_ADD_I32 %0, %1, implicit-def $scc
...

# GCN-LABEL: name: test_fold_same_literal_lhs{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 70, 70
---
name: test_fold_same_literal_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_ADD_I32 70, %0, implicit-def $scc
...

# GCN-LABEL: name: test_fold_same_literal_rhs{{$}}
# GCN: %1:sreg_32 = S_ADD_I32 70, 70
---
name: test_fold_same_literal_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_ADD_I32 %0, 70, implicit-def $scc
...


# GCN-LABEL: name: test_s_cselect_b32_2x_literal_fold{{$}}
# GCN: %2:sreg_32 = S_CSELECT_B32 70, %1, implicit $scc
---
name: test_s_cselect_b32_2x_literal_fold
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    %2:sreg_32 = S_CSELECT_B32 %0, %1, implicit $scc
...

# GCN-LABEL: name: test_s_cselect_b32_fold_literal_literal_lhs{{$}}
# GCN: %1:sreg_32 = S_CSELECT_B32 70, %0, implicit $scc
---
name: test_s_cselect_b32_fold_literal_literal_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    %1:sreg_32 = S_CSELECT_B32 70, %0, implicit $scc
...

# GCN-LABEL: name: test_s_cselect_b32_fold_literal_literal_rhs{{$}}
# GCN: %1:sreg_32 = S_CSELECT_B32 %0, 70, implicit $scc
---
name: test_s_cselect_b32_fold_literal_literal_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    %1:sreg_32 = S_CSELECT_B32 %0, 70, implicit $scc
...

# GCN-LABEL: name: test_s_cselect_b32_fold_literal_inlineimm_lhs{{$}}
# GCN: %1:sreg_32 = S_CSELECT_B32 64, 80, implicit $scc
---
name: test_s_cselect_b32_fold_literal_inlineimm_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    %1:sreg_32 = S_CSELECT_B32 64, %0, implicit $scc
...

# GCN-LABEL: name: test_s_cselect_b32_fold_literal_inlineimm_rhs{{$}}
# GCN: %1:sreg_32 = S_CSELECT_B32 80, 64, implicit $scc
---
name: test_s_cselect_b32_fold_literal_inlineimm_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    %1:sreg_32 = S_CSELECT_B32 %0, 64, implicit $scc
...

# GCN-LABEL: name: test_s_cmp_b32_2x_literal_fold{{$}}
# GCN: S_CMP_EQ_U32 70, %1, implicit-def $scc
---
name: test_s_cmp_b32_2x_literal_fold
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 70
    %1:sreg_32 = S_MOV_B32 80
    $scc = IMPLICIT_DEF
    S_CMP_EQ_U32 %0, %1, implicit-def $scc
...

# GCN-LABEL: name: test_s_cmp_b32_literal_literal_lhs{{$}}
# GCN: S_CMP_EQ_U32 70, %0, implicit-def $scc
---
name: test_s_cmp_b32_literal_literal_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    S_CMP_EQ_U32 70, %0, implicit-def $scc
...

# GCN-LABEL: name: test_s_cmp_b32_literal_literal_rhs{{$}}
# GCN: S_CMP_EQ_U32 %0, 70, implicit-def $scc
---
name: test_s_cmp_b32_literal_literal_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    S_CMP_EQ_U32 %0, 70, implicit-def $scc
...

# GCN-LABEL: name: test_s_cmp_b32_literal_inlineimm_lhs{{$}}
# GCN: S_CMP_EQ_U32 64, 80, implicit-def $scc
---
name: test_s_cmp_b32_literal_inlineimm_lhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    S_CMP_EQ_U32 64, %0, implicit-def $scc
...

# GCN-LABEL: name: test_s_cmp_b32_literal_inlineimm_rhs{{$}}
# GCN: S_CMP_EQ_U32 80, 64, implicit-def $scc
---
name: test_s_cmp_b32_literal_inlineimm_rhs
tracksRegLiveness: true
body: |
  bb.0:
    %0:sreg_32 = S_MOV_B32 80
    S_CMP_EQ_U32 %0, 64, implicit-def $scc
...

# Ignore regmask operands
# GCN-LABEL: name: test_si_cs_chain_fold_with_regmask{{$}}
# GCN: SI_CS_CHAIN_TC_W32 %0, 0, 0, 1234, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
---
name: test_si_cs_chain_fold_with_regmask
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $sgpr0, $sgpr2_sgpr3, $vgpr8

    %1:ccr_sgpr_64 = COPY $sgpr2_sgpr3
    %2:sreg_32 = S_MOV_B32 1234
    SI_CS_CHAIN_TC_W32 %1:ccr_sgpr_64, 0, 0, %2:sreg_32, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr8
...