[x86] make tests immune to scalarization improvements; NFC
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avx1.ll b/llvm/test/CodeGen/X86/stack-folding-int-avx1.ll
index 8746720..91bf9e2 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avx1.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avx1.ll
@@ -72,11 +72,11 @@
ret <4 x i32> %3
}
-define i32 @stack_fold_movd_store(<4 x i32> %a0) {
+define i32 @stack_fold_movd_store(<4 x i32> %a0, <4 x i32> %a1) {
;CHECK-LABEL: stack_fold_movd_store
;CHECK: movd {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
; add forces execution domain
- %1 = add <4 x i32> %a0, <i32 1, i32 1, i32 1, i32 1>
+ %1 = add <4 x i32> %a0, %a1
%2 = extractelement <4 x i32> %1, i32 0
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
@@ -92,11 +92,11 @@
ret <2 x i64> %3
}
-define i64 @stack_fold_movq_store(<2 x i64> %a0) {
+define i64 @stack_fold_movq_store(<2 x i64> %a0, <2 x i64> %a1) {
;CHECK-LABEL: stack_fold_movq_store
;CHECK: movq {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 8-byte Folded Spill
; add forces execution domain
- %1 = add <2 x i64> %a0, <i64 1, i64 1>
+ %1 = add <2 x i64> %a0, %a1
%2 = extractelement <2 x i64> %1, i32 0
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i64 %2
@@ -436,12 +436,12 @@
; TODO stack_fold_pextrb
-define i32 @stack_fold_pextrd(<4 x i32> %a0) {
+define i32 @stack_fold_pextrd(<4 x i32> %a0, <4 x i32> %a1) {
;CHECK-LABEL: stack_fold_pextrd
;CHECK: vpextrd $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
; add forces execution domain
- %1 = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
+ %1 = add <4 x i32> %a0, %a1
%2 = extractelement <4 x i32> %1, i32 1
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll b/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
index 01ae7ff..5464775 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
@@ -836,12 +836,12 @@
ret <32 x i16> %4
}
-define i32 @stack_fold_pextrd(<4 x i32> %a0) {
+define i32 @stack_fold_pextrd(<4 x i32> %a0, <4 x i32> %a1) {
;CHECK-LABEL: stack_fold_pextrd
;CHECK: vpextrd $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
; add forces execution domain
- %1 = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
+ %1 = add <4 x i32> %a0, %a1
%2 = extractelement <4 x i32> %1, i32 1
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-sse42.ll b/llvm/test/CodeGen/X86/stack-folding-int-sse42.ll
index cabfa92..3c5aeb7 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-sse42.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-sse42.ll
@@ -108,11 +108,11 @@
ret <4 x i32> %3
}
-define i32 @stack_fold_movd_store(<4 x i32> %a0) {
+define i32 @stack_fold_movd_store(<4 x i32> %a0, <4 x i32> %a1) {
;CHECK-LABEL: stack_fold_movd_store
;CHECK: movd {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
; add forces execution domain
- %1 = add <4 x i32> %a0, <i32 1, i32 1, i32 1, i32 1>
+ %1 = add <4 x i32> %a0, %a1
%2 = extractelement <4 x i32> %1, i32 0
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
@@ -128,11 +128,11 @@
ret <2 x i64> %3
}
-define i64 @stack_fold_movq_store(<2 x i64> %a0) {
+define i64 @stack_fold_movq_store(<2 x i64> %a0, <2 x i64> %a1) {
;CHECK-LABEL: stack_fold_movq_store
;CHECK: movq {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 8-byte Folded Spill
; add forces execution domain
- %1 = add <2 x i64> %a0, <i64 1, i64 1>
+ %1 = add <2 x i64> %a0, %a1
%2 = extractelement <2 x i64> %1, i32 0
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i64 %2
@@ -487,12 +487,12 @@
ret i16 %extract
}
-define i32 @stack_fold_pextrd(<4 x i32> %a0) {
+define i32 @stack_fold_pextrd(<4 x i32> %a0, <4 x i32> %a1) {
;CHECK-LABEL: stack_fold_pextrd
;CHECK: pextrd $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
; add forces execution domain
- %1 = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
+ %1 = add <4 x i32> %a0, %a1
%2 = extractelement <4 x i32> %1, i32 1
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
