| # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py |
| # RUN: llvm-mca -mtriple=riscv64 -mcpu=sifive-x280 -iterations=1 < %s | FileCheck %s |
| |
| vsetvli zero, zero, e8, mf8, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, mf4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, mf2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, m1, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, m2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, m4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e8, m8, tu, mu |
| vlse8.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, mf4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, mf2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, m1, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, m2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, m4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e16, m8, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e32, mf2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e32, m1, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e32, m2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e32, m4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e32, m8, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e64, m1, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e64, m2, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e64, m4, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| vsetvli zero, zero, e64, m8, tu, mu |
| vlse8.v v1, (a1), a2 |
| vlse16.v v1, (a1), a2 |
| vlse32.v v1, (a1), a2 |
| vlse64.v v1, (a1), a2 |
| |
| # CHECK: Iterations: 1 |
| # CHECK-NEXT: Instructions: 100 |
| # CHECK-NEXT: Total Cycles: 4734 |
| # CHECK-NEXT: Total uOps: 100 |
| |
| # CHECK: Dispatch Width: 2 |
| # CHECK-NEXT: uOps Per Cycle: 0.02 |
| # CHECK-NEXT: IPC: 0.02 |
| # CHECK-NEXT: Block RThroughput: 4686.0 |
| |
| # CHECK: Instruction Info: |
| # CHECK-NEXT: [1]: #uOps |
| # CHECK-NEXT: [2]: Latency |
| # CHECK-NEXT: [3]: RThroughput |
| # CHECK-NEXT: [4]: MayLoad |
| # CHECK-NEXT: [5]: MayStore |
| # CHECK-NEXT: [6]: HasSideEffects (U) |
| |
| # CHECK: [1] [2] [3] [4] [5] [6] Instructions: |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, mf8, tu, mu |
| # CHECK-NEXT: 1 11 9.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, mf4, tu, mu |
| # CHECK-NEXT: 1 19 17.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, mf2, tu, mu |
| # CHECK-NEXT: 1 35 33.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, m1, tu, mu |
| # CHECK-NEXT: 1 67 65.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, m2, tu, mu |
| # CHECK-NEXT: 1 131 129.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, m4, tu, mu |
| # CHECK-NEXT: 1 259 257.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 259 257.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e8, m8, tu, mu |
| # CHECK-NEXT: 1 515 513.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, mf4, tu, mu |
| # CHECK-NEXT: 1 11 9.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, mf2, tu, mu |
| # CHECK-NEXT: 1 19 17.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, m1, tu, mu |
| # CHECK-NEXT: 1 35 33.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, m2, tu, mu |
| # CHECK-NEXT: 1 67 65.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, m4, tu, mu |
| # CHECK-NEXT: 1 131 129.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e16, m8, tu, mu |
| # CHECK-NEXT: 1 259 257.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 259 257.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, mf2, tu, mu |
| # CHECK-NEXT: 1 11 9.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, m1, tu, mu |
| # CHECK-NEXT: 1 19 17.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, m2, tu, mu |
| # CHECK-NEXT: 1 35 33.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, m4, tu, mu |
| # CHECK-NEXT: 1 67 65.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e32, m8, tu, mu |
| # CHECK-NEXT: 1 131 129.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 131 129.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e64, m1, tu, mu |
| # CHECK-NEXT: 1 11 9.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 11 9.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e64, m2, tu, mu |
| # CHECK-NEXT: 1 19 17.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 19 17.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e64, m4, tu, mu |
| # CHECK-NEXT: 1 35 33.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 35 33.00 * vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: 1 3 1.00 U vsetvli zero, zero, e64, m8, tu, mu |
| # CHECK-NEXT: 1 67 65.00 * vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: 1 67 65.00 * vlse64.v v1, (a1), a2 |
| |
| # CHECK: Resources: |
| # CHECK-NEXT: [0] - SiFive7FDiv |
| # CHECK-NEXT: [1] - SiFive7IDiv |
| # CHECK-NEXT: [2] - SiFive7PipeA |
| # CHECK-NEXT: [3] - SiFive7PipeB |
| # CHECK-NEXT: [4] - SiFive7VA |
| # CHECK-NEXT: [5] - SiFive7VCQ |
| # CHECK-NEXT: [6] - SiFive7VL |
| # CHECK-NEXT: [7] - SiFive7VS |
| |
| # CHECK: Resource pressure per iteration: |
| # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] |
| # CHECK-NEXT: - - 22.00 - - 78.00 4686.00 - |
| |
| # CHECK: Resource pressure by instruction: |
| # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions: |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, mf8, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, mf4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, mf2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, m1, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, m2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, m4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 257.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 257.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e8, m8, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 513.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, mf4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, mf2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, m1, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, m2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, m4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e16, m8, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 257.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 257.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, mf2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, m1, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, m2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, m4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e32, m8, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 129.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m1, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 9.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m2, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 17.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m4, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 33.00 - vlse64.v v1, (a1), a2 |
| # CHECK-NEXT: - - 1.00 - - - - - vsetvli zero, zero, e64, m8, tu, mu |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse8.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse16.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse32.v v1, (a1), a2 |
| # CHECK-NEXT: - - - - - 1.00 65.00 - vlse64.v v1, (a1), a2 |
