Sign in
fuchsia
/
third_party
/
github.com
/
llvm
/
llvm-project
/
refs/tags/llvmorg-5.0.1-rc1
/
.
/
llvm
/
test
/
MC
/
Hexagon
/
test.s
blob: 73b6d0a96c71af86a7909d6ab151ae11990dc402 [
file
] [
log
] [
blame
]
#RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv60 %s
{
vmem
(
r0
+
#0) = v0
r0
=
memw
(
r0
)
}