| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -verify-machineinstrs -o - %s | FileCheck %s |
| |
| define arm_aapcs_vfpcc <8 x half> @test_vrndnq_f16(<8 x half> %a) { |
| ; CHECK-LABEL: test_vrndnq_f16: |
| ; CHECK: @ %bb.0: @ %entry |
| ; CHECK-NEXT: vrintn.f16 q0, q0 |
| ; CHECK-NEXT: bx lr |
| entry: |
| %0 = tail call <8 x half> @llvm.arm.mve.vrintn.v8f16(<8 x half> %a) |
| ret <8 x half> %0 |
| } |
| |
| define arm_aapcs_vfpcc <4 x float> @test_vrndnq_f32(<4 x float> %a) { |
| ; CHECK-LABEL: test_vrndnq_f32: |
| ; CHECK: @ %bb.0: @ %entry |
| ; CHECK-NEXT: vrintn.f32 q0, q0 |
| ; CHECK-NEXT: bx lr |
| entry: |
| %0 = tail call <4 x float> @llvm.arm.mve.vrintn.v4f32(<4 x float> %a) |
| ret <4 x float> %0 |
| } |
| |
| declare <8 x half> @llvm.arm.mve.vrintn.v8f16(<8 x half>) |
| declare <4 x float> @llvm.arm.mve.vrintn.v4f32(<4 x float>) |