| # RUN: llc -O0 -run-pass=arm-low-overhead-loops -o - -verify-machineinstrs %s | FileCheck %s |
| # CHECK-NOT: WLS |
| # CHECK-NOT: WhileLoopStart |
| |
| --- | |
| target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" |
| target triple = "thumbv8.1m.main" |
| |
| define void @size_limit(i32* nocapture %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %N) #0 { |
| entry: |
| br label %while |
| |
| for.cond.cleanup: ; preds = %while, %for.body |
| ret void |
| |
| for.body.preheader: ; preds = %while |
| %scevgep = getelementptr i32, i32* %a, i32 -1 |
| %scevgep4 = getelementptr i32, i32* %c, i32 -1 |
| %scevgep8 = getelementptr i32, i32* %b, i32 -1 |
| br label %for.body |
| |
| for.body: ; preds = %for.body, %for.body.preheader |
| %lsr.iv9 = phi i32* [ %scevgep8, %for.body.preheader ], [ %scevgep10, %for.body ] |
| %lsr.iv5 = phi i32* [ %scevgep4, %for.body.preheader ], [ %scevgep6, %for.body ] |
| %lsr.iv1 = phi i32* [ %scevgep, %for.body.preheader ], [ %scevgep2, %for.body ] |
| %0 = phi i32 [ %N, %for.body.preheader ], [ %3, %for.body ] |
| %scevgep11 = getelementptr i32, i32* %lsr.iv9, i32 1 |
| %1 = load i32, i32* %scevgep11, align 4 |
| %scevgep7 = getelementptr i32, i32* %lsr.iv5, i32 1 |
| %2 = load i32, i32* %scevgep7, align 4 |
| %mul = mul nsw i32 %2, %1 |
| %scevgep3 = getelementptr i32, i32* %lsr.iv1, i32 1 |
| store i32 %mul, i32* %scevgep3, align 4 |
| %scevgep2 = getelementptr i32, i32* %lsr.iv1, i32 1 |
| %scevgep6 = getelementptr i32, i32* %lsr.iv5, i32 1 |
| %scevgep10 = getelementptr i32, i32* %lsr.iv9, i32 1 |
| %3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1) |
| %4 = icmp ne i32 %3, 0 |
| br i1 %4, label %for.body, label %for.cond.cleanup |
| |
| while: ; preds = %entry |
| %cmp8 = call i1 @llvm.test.set.loop.iterations.i32(i32 %N) |
| br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup |
| } |
| |
| ; Function Attrs: nounwind |
| declare i32 @llvm.arm.space(i32 immarg, i32) #1 |
| |
| ; Function Attrs: noduplicate nounwind |
| declare i1 @llvm.test.set.loop.iterations.i32(i32) #2 |
| |
| ; Function Attrs: noduplicate nounwind |
| declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #2 |
| |
| attributes #0 = { "target-features"="+lob" } |
| attributes #1 = { nounwind } |
| attributes #2 = { noduplicate nounwind } |
| |
| ... |
| --- |
| name: size_limit |
| alignment: 2 |
| exposesReturnsTwice: false |
| legalized: false |
| regBankSelected: false |
| selected: false |
| failedISel: false |
| tracksRegLiveness: true |
| hasWinCFI: false |
| registers: [] |
| liveins: |
| - { reg: '$r0', virtual-reg: '' } |
| - { reg: '$r1', virtual-reg: '' } |
| - { reg: '$r2', virtual-reg: '' } |
| - { reg: '$r3', virtual-reg: '' } |
| frameInfo: |
| isFrameAddressTaken: false |
| isReturnAddressTaken: false |
| hasStackMap: false |
| hasPatchPoint: false |
| stackSize: 40 |
| offsetAdjustment: 0 |
| maxAlignment: 4 |
| adjustsStack: false |
| hasCalls: false |
| stackProtector: '' |
| maxCallFrameSize: 0 |
| cvBytesOfCalleeSavedRegisters: 0 |
| hasOpaqueSPAdjustment: false |
| hasVAStart: false |
| hasMustTailInVarArgFunc: false |
| localFrameSize: 0 |
| savePoint: '' |
| restorePoint: '' |
| fixedStack: [] |
| stack: |
| - { id: 0, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 1, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 2, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 3, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 4, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 5, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 6, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 7, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 8, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| - { id: 9, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, |
| stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, |
| debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } |
| callSites: [] |
| constants: [] |
| machineFunctionInfo: {} |
| body: | |
| bb.0.entry: |
| successors: %bb.4(0x80000000) |
| liveins: $r0, $r1, $r2, $r3, $r4, $lr |
| |
| frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp |
| frame-setup CFI_INSTRUCTION def_cfa_offset 8 |
| frame-setup CFI_INSTRUCTION offset $lr, -4 |
| frame-setup CFI_INSTRUCTION offset $r4, -8 |
| $sp = frame-setup tSUBspi $sp, 8, 14, $noreg |
| frame-setup CFI_INSTRUCTION def_cfa_offset 40 |
| tSTRspi killed $r3, $sp, 7, 14, $noreg :: (store 4 into %stack.0) |
| tSTRspi killed $r2, $sp, 6, 14, $noreg :: (store 4 into %stack.1) |
| tSTRspi killed $r1, $sp, 5, 14, $noreg :: (store 4 into %stack.2) |
| tSTRspi killed $r0, $sp, 4, 14, $noreg :: (store 4 into %stack.3) |
| tB %bb.4, 14, $noreg |
| |
| bb.1.for.cond.cleanup: |
| $sp = tADDspi $sp, 8, 14, $noreg |
| tPOP_RET 14, $noreg, def $r4, def $pc |
| |
| bb.2.for.body.preheader: |
| successors: %bb.3(0x80000000) |
| |
| $r0 = tLDRspi $sp, 4, 14, $noreg :: (load 4 from %stack.3) |
| renamable $r1, dead $cpsr = tSUBi3 killed renamable $r0, 4, 14, $noreg |
| $r2 = tLDRspi $sp, 6, 14, $noreg :: (load 4 from %stack.1) |
| renamable $r3, dead $cpsr = tSUBi3 killed renamable $r2, 4, 14, $noreg |
| $r12 = t2LDRi12 $sp, 20, 14, $noreg :: (load 4 from %stack.2) |
| renamable $lr = t2SUBri killed renamable $r12, 4, 14, $noreg, $noreg |
| $r4 = tLDRspi $sp, 7, 14, $noreg :: (load 4 from %stack.0) |
| t2STRi12 killed $lr, $sp, 12, 14, $noreg :: (store 4 into %stack.4) |
| tSTRspi killed $r3, $sp, 2, 14, $noreg :: (store 4 into %stack.5) |
| tSTRspi killed $r1, $sp, 1, 14, $noreg :: (store 4 into %stack.6) |
| tSTRspi killed $r4, $sp, 0, 14, $noreg :: (store 4 into %stack.7) |
| tB %bb.3, 14, $noreg |
| |
| bb.3.for.body: |
| successors: %bb.3(0x40000000), %bb.1(0x40000000) |
| |
| $r0 = tLDRspi $sp, 0, 14, $noreg :: (load 4 from %stack.7) |
| $r1 = tLDRspi $sp, 1, 14, $noreg :: (load 4 from %stack.6) |
| $r2 = tLDRspi $sp, 2, 14, $noreg :: (load 4 from %stack.5) |
| $r3 = tLDRspi $sp, 3, 14, $noreg :: (load 4 from %stack.4) |
| renamable $r12, renamable $r3 = t2LDR_PRE renamable $r3, 4, 14, $noreg :: (load 4 from %ir.scevgep11) |
| renamable $lr, renamable $r2 = t2LDR_PRE renamable $r2, 4, 14, $noreg :: (load 4 from %ir.scevgep7) |
| renamable $r12 = nsw t2MUL killed renamable $lr, killed renamable $r12, 14, $noreg |
| early-clobber renamable $r1 = t2STR_PRE killed renamable $r12, renamable $r1, 4, 14, $noreg :: (store 4 into %ir.scevgep3) |
| $lr = tMOVr killed $r0, 14, $noreg |
| renamable $lr = t2LoopDec killed renamable $lr, 1 |
| $r0 = tMOVr $lr, 14, $noreg |
| tSTRspi killed $r0, $sp, 0, 14, $noreg :: (store 4 into %stack.7) |
| tSTRspi killed $r1, $sp, 1, 14, $noreg :: (store 4 into %stack.6) |
| tSTRspi killed $r2, $sp, 2, 14, $noreg :: (store 4 into %stack.5) |
| tSTRspi killed $r3, $sp, 3, 14, $noreg :: (store 4 into %stack.4) |
| t2LoopEnd killed renamable $lr, %bb.3, implicit-def dead $cpsr |
| tB %bb.1, 14, $noreg |
| |
| bb.4.while: |
| successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| |
| $r0 = tLDRspi $sp, 7, 14, $noreg :: (load 4 from %stack.0) |
| t2WhileLoopStart killed renamable $r0, %bb.1, implicit-def dead $cpsr |
| tB %bb.2, 14, $noreg |
| |
| ... |
