| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 |
| ; RUN: opt -p loop-vectorize -S %s | FileCheck --check-prefix=DEFAULT %s |
| ; RUN: opt -p loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue -S %s | FileCheck --check-prefix=PRED %s |
| |
| target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" |
| target triple = "arm64-apple-macosx14.0.0" |
| |
| define void @invar_cond_gep_store(ptr %dst, i32 %0) { |
| ; DEFAULT-LABEL: define void @invar_cond_gep_store( |
| ; DEFAULT-SAME: ptr [[DST:%.*]], i32 [[TMP0:%.*]]) { |
| ; DEFAULT-NEXT: entry: |
| ; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; DEFAULT: vector.ph: |
| ; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0 |
| ; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer |
| ; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; DEFAULT: vector.body: |
| ; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE14:%.*]] ] |
| ; DEFAULT-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]] |
| ; DEFAULT-NEXT: [[TMP1:%.*]] = icmp eq <4 x i32> [[BROADCAST_SPLAT]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP2:%.*]] = icmp eq <4 x i32> [[BROADCAST_SPLAT]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP3]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; DEFAULT: pred.store.if: |
| ; DEFAULT-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 0 |
| ; DEFAULT-NEXT: [[TMP5:%.*]] = add i64 [[TMP4]], 1 |
| ; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP5]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP6]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; DEFAULT: pred.store.continue: |
| ; DEFAULT-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] |
| ; DEFAULT: pred.store.if1: |
| ; DEFAULT-NEXT: [[TMP8:%.*]] = add i64 [[OFFSET_IDX]], 1 |
| ; DEFAULT-NEXT: [[TMP9:%.*]] = add i64 [[TMP8]], 1 |
| ; DEFAULT-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP9]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP10]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE2]] |
| ; DEFAULT: pred.store.continue2: |
| ; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] |
| ; DEFAULT: pred.store.if3: |
| ; DEFAULT-NEXT: [[TMP12:%.*]] = add i64 [[OFFSET_IDX]], 2 |
| ; DEFAULT-NEXT: [[TMP13:%.*]] = add i64 [[TMP12]], 1 |
| ; DEFAULT-NEXT: [[TMP14:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP13]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP14]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE4]] |
| ; DEFAULT: pred.store.continue4: |
| ; DEFAULT-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6:%.*]] |
| ; DEFAULT: pred.store.if5: |
| ; DEFAULT-NEXT: [[TMP16:%.*]] = add i64 [[OFFSET_IDX]], 3 |
| ; DEFAULT-NEXT: [[TMP17:%.*]] = add i64 [[TMP16]], 1 |
| ; DEFAULT-NEXT: [[TMP18:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP17]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP18]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE6]] |
| ; DEFAULT: pred.store.continue6: |
| ; DEFAULT-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP2]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF7:%.*]], label [[PRED_STORE_CONTINUE8:%.*]] |
| ; DEFAULT: pred.store.if7: |
| ; DEFAULT-NEXT: [[TMP20:%.*]] = add i64 [[OFFSET_IDX]], 4 |
| ; DEFAULT-NEXT: [[TMP21:%.*]] = add i64 [[TMP20]], 1 |
| ; DEFAULT-NEXT: [[TMP22:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP21]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP22]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE8]] |
| ; DEFAULT: pred.store.continue8: |
| ; DEFAULT-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP2]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP23]], label [[PRED_STORE_IF9:%.*]], label [[PRED_STORE_CONTINUE10:%.*]] |
| ; DEFAULT: pred.store.if9: |
| ; DEFAULT-NEXT: [[TMP24:%.*]] = add i64 [[OFFSET_IDX]], 5 |
| ; DEFAULT-NEXT: [[TMP25:%.*]] = add i64 [[TMP24]], 1 |
| ; DEFAULT-NEXT: [[TMP26:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP25]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP26]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE10]] |
| ; DEFAULT: pred.store.continue10: |
| ; DEFAULT-NEXT: [[TMP27:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP27]], label [[PRED_STORE_IF11:%.*]], label [[PRED_STORE_CONTINUE12:%.*]] |
| ; DEFAULT: pred.store.if11: |
| ; DEFAULT-NEXT: [[TMP28:%.*]] = add i64 [[OFFSET_IDX]], 6 |
| ; DEFAULT-NEXT: [[TMP29:%.*]] = add i64 [[TMP28]], 1 |
| ; DEFAULT-NEXT: [[TMP30:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP29]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP30]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE12]] |
| ; DEFAULT: pred.store.continue12: |
| ; DEFAULT-NEXT: [[TMP31:%.*]] = extractelement <4 x i1> [[TMP2]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP31]], label [[PRED_STORE_IF13:%.*]], label [[PRED_STORE_CONTINUE14]] |
| ; DEFAULT: pred.store.if13: |
| ; DEFAULT-NEXT: [[TMP32:%.*]] = add i64 [[OFFSET_IDX]], 7 |
| ; DEFAULT-NEXT: [[TMP33:%.*]] = add i64 [[TMP32]], 1 |
| ; DEFAULT-NEXT: [[TMP34:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP33]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[TMP34]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE14]] |
| ; DEFAULT: pred.store.continue14: |
| ; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; DEFAULT-NEXT: [[TMP35:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 |
| ; DEFAULT-NEXT: br i1 [[TMP35]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; DEFAULT: middle.block: |
| ; DEFAULT-NEXT: br i1 false, label [[EXIT:%.*]], label [[SCALAR_PH]] |
| ; DEFAULT: scalar.ph: |
| ; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 97, [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ] |
| ; DEFAULT-NEXT: br label [[LOOP_HEADER:%.*]] |
| ; DEFAULT: loop.header: |
| ; DEFAULT-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] |
| ; DEFAULT-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; DEFAULT-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP0]], 0 |
| ; DEFAULT-NEXT: br i1 [[CMP9]], label [[THEN:%.*]], label [[LOOP_LATCH]] |
| ; DEFAULT: then: |
| ; DEFAULT-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[DST]], i64 [[IV_NEXT]] |
| ; DEFAULT-NEXT: store i32 1, ptr [[GEP]], align 4 |
| ; DEFAULT-NEXT: br label [[LOOP_LATCH]] |
| ; DEFAULT: loop.latch: |
| ; DEFAULT-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; DEFAULT-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; DEFAULT: exit: |
| ; DEFAULT-NEXT: ret void |
| ; |
| ; PRED-LABEL: define void @invar_cond_gep_store( |
| ; PRED-SAME: ptr [[DST:%.*]], i32 [[TMP0:%.*]]) { |
| ; PRED-NEXT: entry: |
| ; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; PRED: vector.ph: |
| ; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[TMP0]], i64 0 |
| ; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer |
| ; PRED-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; PRED: vector.body: |
| ; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] |
| ; PRED-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]] |
| ; PRED-NEXT: [[TMP1:%.*]] = icmp eq <4 x i32> [[BROADCAST_SPLAT]], zeroinitializer |
| ; PRED-NEXT: [[TMP2:%.*]] = extractelement <4 x i1> [[TMP1]], i32 0 |
| ; PRED-NEXT: br i1 [[TMP2]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; PRED: pred.store.if: |
| ; PRED-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 0 |
| ; PRED-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], 1 |
| ; PRED-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP4]] |
| ; PRED-NEXT: store i32 1, ptr [[TMP5]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; PRED: pred.store.continue: |
| ; PRED-NEXT: [[TMP6:%.*]] = extractelement <4 x i1> [[TMP1]], i32 1 |
| ; PRED-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] |
| ; PRED: pred.store.if1: |
| ; PRED-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], 1 |
| ; PRED-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 1 |
| ; PRED-NEXT: [[TMP9:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP8]] |
| ; PRED-NEXT: store i32 1, ptr [[TMP9]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE2]] |
| ; PRED: pred.store.continue2: |
| ; PRED-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP1]], i32 2 |
| ; PRED-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] |
| ; PRED: pred.store.if3: |
| ; PRED-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 2 |
| ; PRED-NEXT: [[TMP12:%.*]] = add i64 [[TMP11]], 1 |
| ; PRED-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP12]] |
| ; PRED-NEXT: store i32 1, ptr [[TMP13]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE4]] |
| ; PRED: pred.store.continue4: |
| ; PRED-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP1]], i32 3 |
| ; PRED-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] |
| ; PRED: pred.store.if5: |
| ; PRED-NEXT: [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 3 |
| ; PRED-NEXT: [[TMP16:%.*]] = add i64 [[TMP15]], 1 |
| ; PRED-NEXT: [[TMP17:%.*]] = getelementptr i32, ptr [[DST]], i64 [[TMP16]] |
| ; PRED-NEXT: store i32 1, ptr [[TMP17]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE6]] |
| ; PRED: pred.store.continue6: |
| ; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; PRED-NEXT: [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; PRED-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; PRED: middle.block: |
| ; PRED-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]] |
| ; PRED: scalar.ph: |
| ; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 101, [[MIDDLE_BLOCK]] ], [ 1, [[ENTRY:%.*]] ] |
| ; PRED-NEXT: br label [[LOOP_HEADER:%.*]] |
| ; PRED: loop.header: |
| ; PRED-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ] |
| ; PRED-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; PRED-NEXT: [[CMP9:%.*]] = icmp eq i32 [[TMP0]], 0 |
| ; PRED-NEXT: br i1 [[CMP9]], label [[THEN:%.*]], label [[LOOP_LATCH]] |
| ; PRED: then: |
| ; PRED-NEXT: [[GEP:%.*]] = getelementptr i32, ptr [[DST]], i64 [[IV_NEXT]] |
| ; PRED-NEXT: store i32 1, ptr [[GEP]], align 4 |
| ; PRED-NEXT: br label [[LOOP_LATCH]] |
| ; PRED: loop.latch: |
| ; PRED-NEXT: [[EC:%.*]] = icmp eq i64 [[IV]], 100 |
| ; PRED-NEXT: br i1 [[EC]], label [[EXIT]], label [[LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; PRED: exit: |
| ; PRED-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 1, %entry ], [ %iv.next, %loop.latch ] |
| %iv.next = add i64 %iv, 1 |
| %cmp9 = icmp eq i32 %0, 0 |
| br i1 %cmp9, label %then, label %loop.latch |
| |
| then: |
| %gep = getelementptr i32, ptr %dst, i64 %iv.next |
| store i32 1, ptr %gep, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %ec = icmp eq i64 %iv, 100 |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| declare double @llvm.fabs.f64(double) #0 |
| |
| define void @loop_dependent_cond(ptr %src, ptr noalias %dst, i64 %N) { |
| ; DEFAULT-LABEL: define void @loop_dependent_cond( |
| ; DEFAULT-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) { |
| ; DEFAULT-NEXT: entry: |
| ; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[N]], 1 |
| ; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4 |
| ; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; DEFAULT: vector.ph: |
| ; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4 |
| ; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]] |
| ; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; DEFAULT: vector.body: |
| ; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE7:%.*]] ] |
| ; DEFAULT-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 0 |
| ; DEFAULT-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2 |
| ; DEFAULT-NEXT: [[TMP3:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP1]] |
| ; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP2]] |
| ; DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr double, ptr [[TMP3]], i32 0 |
| ; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr double, ptr [[TMP3]], i32 2 |
| ; DEFAULT-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP5]], align 8 |
| ; DEFAULT-NEXT: [[WIDE_LOAD1:%.*]] = load <2 x double>, ptr [[TMP6]], align 8 |
| ; DEFAULT-NEXT: [[TMP7:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD]]) |
| ; DEFAULT-NEXT: [[TMP8:%.*]] = call <2 x double> @llvm.fabs.v2f64(<2 x double> [[WIDE_LOAD1]]) |
| ; DEFAULT-NEXT: [[TMP9:%.*]] = fcmp ogt <2 x double> [[TMP7]], <double 1.000000e+00, double 1.000000e+00> |
| ; DEFAULT-NEXT: [[TMP10:%.*]] = fcmp ogt <2 x double> [[TMP8]], <double 1.000000e+00, double 1.000000e+00> |
| ; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <2 x i1> [[TMP9]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; DEFAULT: pred.store.if: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; DEFAULT: pred.store.continue: |
| ; DEFAULT-NEXT: [[TMP12:%.*]] = extractelement <2 x i1> [[TMP9]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]] |
| ; DEFAULT: pred.store.if2: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE3]] |
| ; DEFAULT: pred.store.continue3: |
| ; DEFAULT-NEXT: [[TMP13:%.*]] = extractelement <2 x i1> [[TMP10]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] |
| ; DEFAULT: pred.store.if4: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE5]] |
| ; DEFAULT: pred.store.continue5: |
| ; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <2 x i1> [[TMP10]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7]] |
| ; DEFAULT: pred.store.if6: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE7]] |
| ; DEFAULT: pred.store.continue7: |
| ; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 |
| ; DEFAULT-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[TMP15]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; DEFAULT: middle.block: |
| ; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[CMP_N]], label [[FOR_END123:%.*]], label [[SCALAR_PH]] |
| ; DEFAULT: scalar.ph: |
| ; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] |
| ; DEFAULT-NEXT: br label [[FOR_BODY112:%.*]] |
| ; DEFAULT: loop.header: |
| ; DEFAULT-NEXT: [[IV175:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT176:%.*]], [[FOR_INC121:%.*]] ] |
| ; DEFAULT-NEXT: [[ARRAYIDX114:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV175]] |
| ; DEFAULT-NEXT: [[TMP16:%.*]] = load double, ptr [[ARRAYIDX114]], align 8 |
| ; DEFAULT-NEXT: [[TMP17:%.*]] = tail call double @llvm.fabs.f64(double [[TMP16]]) |
| ; DEFAULT-NEXT: [[CMP115:%.*]] = fcmp ogt double [[TMP17]], 1.000000e+00 |
| ; DEFAULT-NEXT: br i1 [[CMP115]], label [[IF_THEN117:%.*]], label [[FOR_INC121]] |
| ; DEFAULT: then: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[FOR_INC121]] |
| ; DEFAULT: loop.latch: |
| ; DEFAULT-NEXT: [[IV_NEXT176]] = add i64 [[IV175]], 1 |
| ; DEFAULT-NEXT: [[EXITCOND180_NOT:%.*]] = icmp eq i64 [[IV175]], [[N]] |
| ; DEFAULT-NEXT: br i1 [[EXITCOND180_NOT]], label [[FOR_END123]], label [[FOR_BODY112]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; DEFAULT: exit: |
| ; DEFAULT-NEXT: ret void |
| ; |
| ; PRED-LABEL: define void @loop_dependent_cond( |
| ; PRED-SAME: ptr [[SRC:%.*]], ptr noalias [[DST:%.*]], i64 [[N:%.*]]) { |
| ; PRED-NEXT: entry: |
| ; PRED-NEXT: br label [[FOR_BODY112:%.*]] |
| ; PRED: loop.header: |
| ; PRED-NEXT: [[IV175:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT176:%.*]], [[FOR_INC121:%.*]] ] |
| ; PRED-NEXT: [[ARRAYIDX114:%.*]] = getelementptr double, ptr [[SRC]], i64 [[IV175]] |
| ; PRED-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX114]], align 8 |
| ; PRED-NEXT: [[TMP1:%.*]] = tail call double @llvm.fabs.f64(double [[TMP0]]) |
| ; PRED-NEXT: [[CMP115:%.*]] = fcmp ogt double [[TMP1]], 1.000000e+00 |
| ; PRED-NEXT: br i1 [[CMP115]], label [[IF_THEN117:%.*]], label [[FOR_INC121]] |
| ; PRED: then: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[FOR_INC121]] |
| ; PRED: loop.latch: |
| ; PRED-NEXT: [[IV_NEXT176]] = add i64 [[IV175]], 1 |
| ; PRED-NEXT: [[EXITCOND180_NOT:%.*]] = icmp eq i64 [[IV175]], [[N]] |
| ; PRED-NEXT: br i1 [[EXITCOND180_NOT]], label [[FOR_END123:%.*]], label [[FOR_BODY112]] |
| ; PRED: exit: |
| ; PRED-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] |
| %gep = getelementptr double, ptr %src, i64 %iv |
| %l = load double, ptr %gep, align 8 |
| %abs = tail call double @llvm.fabs.f64(double %l) |
| %cmp = fcmp ogt double %abs, 1.000000e+00 |
| br i1 %cmp, label %then, label %loop.latch |
| |
| then: |
| store i32 0, ptr %dst, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, %N |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @invar_cond_chain_1(ptr %I, ptr noalias %src, i1 %c) { |
| ; DEFAULT-LABEL: define void @invar_cond_chain_1( |
| ; DEFAULT-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], i1 [[C:%.*]]) { |
| ; DEFAULT-NEXT: entry: |
| ; DEFAULT-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64 |
| ; DEFAULT-NEXT: [[I1:%.*]] = ptrtoint ptr [[I]] to i64 |
| ; DEFAULT-NEXT: [[TMP29:%.*]] = sub i64 [[I1]], [[SRC2]] |
| ; DEFAULT-NEXT: [[TMP0:%.*]] = lshr i64 [[TMP29]], 2 |
| ; DEFAULT-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[TMP0]], 1 |
| ; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 8 |
| ; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; DEFAULT: vector.ph: |
| ; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP1]], 8 |
| ; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP1]], [[N_MOD_VF]] |
| ; DEFAULT-NEXT: [[TMP2:%.*]] = mul i64 [[N_VEC]], 4 |
| ; DEFAULT-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP2]] |
| ; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i1> poison, i1 [[C]], i64 0 |
| ; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i1> [[BROADCAST_SPLATINSERT]], <4 x i1> poison, <4 x i32> zeroinitializer |
| ; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; DEFAULT: vector.body: |
| ; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE17:%.*]] ] |
| ; DEFAULT-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4 |
| ; DEFAULT-NEXT: [[TMP3:%.*]] = add i64 [[OFFSET_IDX]], 0 |
| ; DEFAULT-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 16 |
| ; DEFAULT-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP3]] |
| ; DEFAULT-NEXT: [[NEXT_GEP3:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP4]] |
| ; DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[NEXT_GEP]], i32 0 |
| ; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr i32, ptr [[NEXT_GEP]], i32 4 |
| ; DEFAULT-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP5]], align 4 |
| ; DEFAULT-NEXT: [[WIDE_LOAD3:%.*]] = load <4 x i32>, ptr [[TMP6]], align 4 |
| ; DEFAULT-NEXT: [[TMP7:%.*]] = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> zeroinitializer |
| ; DEFAULT-NEXT: [[TMP8:%.*]] = select <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> [[BROADCAST_SPLAT]], <4 x i1> zeroinitializer |
| ; DEFAULT-NEXT: [[TMP9:%.*]] = or <4 x i1> [[TMP7]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP10:%.*]] = or <4 x i1> [[TMP8]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP9]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; DEFAULT: pred.store.if: |
| ; DEFAULT-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 0 |
| ; DEFAULT-NEXT: store i32 [[TMP12]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; DEFAULT: pred.store.continue: |
| ; DEFAULT-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP9]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] |
| ; DEFAULT: pred.store.if5: |
| ; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 1 |
| ; DEFAULT-NEXT: store i32 [[TMP14]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE5]] |
| ; DEFAULT: pred.store.continue6: |
| ; DEFAULT-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP9]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]] |
| ; DEFAULT: pred.store.if7: |
| ; DEFAULT-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 2 |
| ; DEFAULT-NEXT: store i32 [[TMP16]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE7]] |
| ; DEFAULT: pred.store.continue8: |
| ; DEFAULT-NEXT: [[TMP17:%.*]] = extractelement <4 x i1> [[TMP9]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP17]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9:%.*]] |
| ; DEFAULT: pred.store.if9: |
| ; DEFAULT-NEXT: [[TMP18:%.*]] = extractelement <4 x i32> [[WIDE_LOAD]], i32 3 |
| ; DEFAULT-NEXT: store i32 [[TMP18]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE9]] |
| ; DEFAULT: pred.store.continue10: |
| ; DEFAULT-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP10]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11:%.*]] |
| ; DEFAULT: pred.store.if11: |
| ; DEFAULT-NEXT: [[TMP20:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 0 |
| ; DEFAULT-NEXT: store i32 [[TMP20]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE11]] |
| ; DEFAULT: pred.store.continue12: |
| ; DEFAULT-NEXT: [[TMP21:%.*]] = extractelement <4 x i1> [[TMP10]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP21]], label [[PRED_STORE_IF12:%.*]], label [[PRED_STORE_CONTINUE13:%.*]] |
| ; DEFAULT: pred.store.if13: |
| ; DEFAULT-NEXT: [[TMP22:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 1 |
| ; DEFAULT-NEXT: store i32 [[TMP22]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE13]] |
| ; DEFAULT: pred.store.continue14: |
| ; DEFAULT-NEXT: [[TMP23:%.*]] = extractelement <4 x i1> [[TMP10]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP23]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15:%.*]] |
| ; DEFAULT: pred.store.if15: |
| ; DEFAULT-NEXT: [[TMP24:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 2 |
| ; DEFAULT-NEXT: store i32 [[TMP24]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE15]] |
| ; DEFAULT: pred.store.continue16: |
| ; DEFAULT-NEXT: [[TMP25:%.*]] = extractelement <4 x i1> [[TMP10]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP25]], label [[PRED_STORE_IF16:%.*]], label [[PRED_STORE_CONTINUE17]] |
| ; DEFAULT: pred.store.if17: |
| ; DEFAULT-NEXT: [[TMP26:%.*]] = extractelement <4 x i32> [[WIDE_LOAD3]], i32 3 |
| ; DEFAULT-NEXT: store i32 [[TMP26]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE17]] |
| ; DEFAULT: pred.store.continue18: |
| ; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; DEFAULT-NEXT: [[TMP27:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[TMP27]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; DEFAULT: middle.block: |
| ; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP1]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP312_LOOPEXIT:%.*]], label [[SCALAR_PH]] |
| ; DEFAULT: scalar.ph: |
| ; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SRC]], [[ENTRY:%.*]] ] |
| ; DEFAULT-NEXT: br label [[FOR_BODY313:%.*]] |
| ; DEFAULT: loop.header: |
| ; DEFAULT-NEXT: [[__BEGIN3_011973:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] |
| ; DEFAULT-NEXT: [[TMP28:%.*]] = load i32, ptr [[__BEGIN3_011973]], align 4 |
| ; DEFAULT-NEXT: br i1 true, label [[IF_ELSE321:%.*]], label [[IF_THEN316:%.*]] |
| ; DEFAULT: if: |
| ; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] |
| ; DEFAULT: else.1: |
| ; DEFAULT-NEXT: br i1 [[C]], label [[IF_THEN323:%.*]], label [[IF_END327]] |
| ; DEFAULT: else.2: |
| ; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT]] |
| ; DEFAULT: split: |
| ; DEFAULT-NEXT: store i32 [[TMP28]], ptr [[I]], align 4 |
| ; DEFAULT-NEXT: br label [[IF_END327]] |
| ; DEFAULT: loop.latch: |
| ; DEFAULT-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_011973]], i64 4 |
| ; DEFAULT-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_011973]], [[I]] |
| ; DEFAULT-NEXT: br i1 [[CMP311_NOT]], label [[FOR_COND_CLEANUP312_LOOPEXIT]], label [[FOR_BODY313]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; DEFAULT: exit: |
| ; DEFAULT-NEXT: ret void |
| ; |
| ; PRED-LABEL: define void @invar_cond_chain_1( |
| ; PRED-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], i1 [[C:%.*]]) { |
| ; PRED-NEXT: entry: |
| ; PRED-NEXT: br label [[FOR_BODY313:%.*]] |
| ; PRED: loop.header: |
| ; PRED-NEXT: [[__BEGIN3_011973:%.*]] = phi ptr [ [[SRC]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] |
| ; PRED-NEXT: [[TMP0:%.*]] = load i32, ptr [[__BEGIN3_011973]], align 4 |
| ; PRED-NEXT: br i1 true, label [[IF_ELSE321:%.*]], label [[IF_THEN316:%.*]] |
| ; PRED: if: |
| ; PRED-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] |
| ; PRED: else.1: |
| ; PRED-NEXT: br i1 [[C]], label [[IF_THEN323:%.*]], label [[IF_END327]] |
| ; PRED: else.2: |
| ; PRED-NEXT: br label [[IF_END327_SINK_SPLIT]] |
| ; PRED: split: |
| ; PRED-NEXT: store i32 [[TMP0]], ptr [[I]], align 4 |
| ; PRED-NEXT: br label [[IF_END327]] |
| ; PRED: loop.latch: |
| ; PRED-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_011973]], i64 4 |
| ; PRED-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_011973]], [[I]] |
| ; PRED-NEXT: br i1 [[CMP311_NOT]], label [[FOR_COND_CLEANUP312_LOOPEXIT:%.*]], label [[FOR_BODY313]] |
| ; PRED: exit: |
| ; PRED-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %ptr.iv = phi ptr [ %src, %entry ], [ %ptr.iv.next, %loop.latch ] |
| %l = load i32, ptr %ptr.iv, align 4 |
| br i1 true, label %else.1, label %if |
| |
| if: |
| br label %split |
| |
| else.1: |
| br i1 %c, label %else.2, label %loop.latch |
| |
| else.2: |
| br label %split |
| |
| split: |
| store i32 %l, ptr %I, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %ptr.iv.next = getelementptr inbounds i8, ptr %ptr.iv, i64 4 |
| %ec = icmp eq ptr %ptr.iv, %I |
| br i1 %ec, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @invar_cond_chain_2(ptr %I, ptr noalias %src, ptr noalias %dst, i32 %a) { |
| ; DEFAULT-LABEL: define void @invar_cond_chain_2( |
| ; DEFAULT-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[A:%.*]]) { |
| ; DEFAULT-NEXT: entry: |
| ; DEFAULT-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64 |
| ; DEFAULT-NEXT: [[I1:%.*]] = ptrtoint ptr [[I]] to i64 |
| ; DEFAULT-NEXT: [[TMP0:%.*]] = sub i64 [[I1]], [[SRC2]] |
| ; DEFAULT-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 2 |
| ; DEFAULT-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; DEFAULT-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 8 |
| ; DEFAULT-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; DEFAULT: vector.ph: |
| ; DEFAULT-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 8 |
| ; DEFAULT-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]] |
| ; DEFAULT-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 4 |
| ; DEFAULT-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP3]] |
| ; DEFAULT-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 |
| ; DEFAULT-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT]], <4 x i32> poison, <4 x i32> zeroinitializer |
| ; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; DEFAULT: vector.body: |
| ; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE15:%.*]] ] |
| ; DEFAULT-NEXT: [[TMP4:%.*]] = icmp sgt <4 x i32> [[BROADCAST_SPLAT]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP5:%.*]] = icmp sgt <4 x i32> [[BROADCAST_SPLAT]], zeroinitializer |
| ; DEFAULT-NEXT: [[TMP6:%.*]] = xor <4 x i1> [[TMP4]], <i1 true, i1 true, i1 true, i1 true> |
| ; DEFAULT-NEXT: [[TMP7:%.*]] = xor <4 x i1> [[TMP5]], <i1 true, i1 true, i1 true, i1 true> |
| ; DEFAULT-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP6]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; DEFAULT: pred.store.if: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; DEFAULT: pred.store.continue: |
| ; DEFAULT-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP6]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]] |
| ; DEFAULT: pred.store.if3: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE3]] |
| ; DEFAULT: pred.store.continue4: |
| ; DEFAULT-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP6]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]] |
| ; DEFAULT: pred.store.if5: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE5]] |
| ; DEFAULT: pred.store.continue6: |
| ; DEFAULT-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP6]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]] |
| ; DEFAULT: pred.store.if7: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE7]] |
| ; DEFAULT: pred.store.continue8: |
| ; DEFAULT-NEXT: [[TMP12:%.*]] = extractelement <4 x i1> [[TMP7]], i32 0 |
| ; DEFAULT-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9:%.*]] |
| ; DEFAULT: pred.store.if9: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE9]] |
| ; DEFAULT: pred.store.continue10: |
| ; DEFAULT-NEXT: [[TMP13:%.*]] = extractelement <4 x i1> [[TMP7]], i32 1 |
| ; DEFAULT-NEXT: br i1 [[TMP13]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11:%.*]] |
| ; DEFAULT: pred.store.if11: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE11]] |
| ; DEFAULT: pred.store.continue12: |
| ; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <4 x i1> [[TMP7]], i32 2 |
| ; DEFAULT-NEXT: br i1 [[TMP14]], label [[PRED_STORE_IF12:%.*]], label [[PRED_STORE_CONTINUE13:%.*]] |
| ; DEFAULT: pred.store.if13: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE13]] |
| ; DEFAULT: pred.store.continue14: |
| ; DEFAULT-NEXT: [[TMP15:%.*]] = extractelement <4 x i1> [[TMP7]], i32 3 |
| ; DEFAULT-NEXT: br i1 [[TMP15]], label [[PRED_STORE_IF14:%.*]], label [[PRED_STORE_CONTINUE15]] |
| ; DEFAULT: pred.store.if15: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[PRED_STORE_CONTINUE15]] |
| ; DEFAULT: pred.store.continue16: |
| ; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| ; DEFAULT-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] |
| ; DEFAULT: middle.block: |
| ; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]] |
| ; DEFAULT-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP312_LOOPEXIT:%.*]], label [[SCALAR_PH]] |
| ; DEFAULT: scalar.ph: |
| ; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SRC]], [[ENTRY:%.*]] ] |
| ; DEFAULT-NEXT: br label [[FOR_BODY313:%.*]] |
| ; DEFAULT: loop.header: |
| ; DEFAULT-NEXT: [[__BEGIN3_01197:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] |
| ; DEFAULT-NEXT: [[CMP315_NOT:%.*]] = icmp sgt i32 [[A]], 0 |
| ; DEFAULT-NEXT: br i1 [[CMP315_NOT]], label [[IF_END327]], label [[IF_THEN316:%.*]] |
| ; DEFAULT: if: |
| ; DEFAULT-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] |
| ; DEFAULT: else: |
| ; DEFAULT-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; DEFAULT-NEXT: br label [[IF_END327]] |
| ; DEFAULT: loop.latch: |
| ; DEFAULT-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_01197]], i64 4 |
| ; DEFAULT-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_01197]], [[I]] |
| ; DEFAULT-NEXT: br i1 [[CMP311_NOT]], label [[FOR_COND_CLEANUP312_LOOPEXIT]], label [[FOR_BODY313]], !llvm.loop [[LOOP9:![0-9]+]] |
| ; DEFAULT: exit: |
| ; DEFAULT-NEXT: ret void |
| ; |
| ; PRED-LABEL: define void @invar_cond_chain_2( |
| ; PRED-SAME: ptr [[I:%.*]], ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]], i32 [[A:%.*]]) { |
| ; PRED-NEXT: entry: |
| ; PRED-NEXT: [[SRC2:%.*]] = ptrtoint ptr [[SRC]] to i64 |
| ; PRED-NEXT: [[I1:%.*]] = ptrtoint ptr [[I]] to i64 |
| ; PRED-NEXT: [[TMP0:%.*]] = sub i64 [[I1]], [[SRC2]] |
| ; PRED-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 2 |
| ; PRED-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 |
| ; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; PRED: vector.ph: |
| ; PRED-NEXT: [[N_RND_UP:%.*]] = add i64 [[TMP2]], 3 |
| ; PRED-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N_RND_UP]], 4 |
| ; PRED-NEXT: [[N_VEC:%.*]] = sub i64 [[N_RND_UP]], [[N_MOD_VF]] |
| ; PRED-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 4 |
| ; PRED-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[SRC]], i64 [[TMP3]] |
| ; PRED-NEXT: [[TRIP_COUNT_MINUS_1:%.*]] = sub i64 [[TMP2]], 1 |
| ; PRED-NEXT: [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i64> poison, i64 [[TRIP_COUNT_MINUS_1]], i64 0 |
| ; PRED-NEXT: [[BROADCAST_SPLAT3:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT2]], <4 x i64> poison, <4 x i32> zeroinitializer |
| ; PRED-NEXT: [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <4 x i32> poison, i32 [[A]], i64 0 |
| ; PRED-NEXT: [[BROADCAST_SPLAT5:%.*]] = shufflevector <4 x i32> [[BROADCAST_SPLATINSERT4]], <4 x i32> poison, <4 x i32> zeroinitializer |
| ; PRED-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; PRED: vector.body: |
| ; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE11:%.*]] ] |
| ; PRED-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[INDEX]], i64 0 |
| ; PRED-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer |
| ; PRED-NEXT: [[VEC_IV:%.*]] = add <4 x i64> [[BROADCAST_SPLAT]], <i64 0, i64 1, i64 2, i64 3> |
| ; PRED-NEXT: [[TMP4:%.*]] = icmp ule <4 x i64> [[VEC_IV]], [[BROADCAST_SPLAT3]] |
| ; PRED-NEXT: [[TMP5:%.*]] = icmp sgt <4 x i32> [[BROADCAST_SPLAT5]], zeroinitializer |
| ; PRED-NEXT: [[TMP6:%.*]] = xor <4 x i1> [[TMP5]], <i1 true, i1 true, i1 true, i1 true> |
| ; PRED-NEXT: [[TMP7:%.*]] = select <4 x i1> [[TMP4]], <4 x i1> [[TMP6]], <4 x i1> zeroinitializer |
| ; PRED-NEXT: [[TMP8:%.*]] = extractelement <4 x i1> [[TMP7]], i32 0 |
| ; PRED-NEXT: br i1 [[TMP8]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; PRED: pred.store.if: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; PRED: pred.store.continue: |
| ; PRED-NEXT: [[TMP9:%.*]] = extractelement <4 x i1> [[TMP7]], i32 1 |
| ; PRED-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]] |
| ; PRED: pred.store.if7: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE7]] |
| ; PRED: pred.store.continue8: |
| ; PRED-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP7]], i32 2 |
| ; PRED-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF8:%.*]], label [[PRED_STORE_CONTINUE9:%.*]] |
| ; PRED: pred.store.if9: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE9]] |
| ; PRED: pred.store.continue10: |
| ; PRED-NEXT: [[TMP11:%.*]] = extractelement <4 x i1> [[TMP7]], i32 3 |
| ; PRED-NEXT: br i1 [[TMP11]], label [[PRED_STORE_IF10:%.*]], label [[PRED_STORE_CONTINUE11]] |
| ; PRED: pred.store.if11: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE11]] |
| ; PRED: pred.store.continue12: |
| ; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 |
| ; PRED-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; PRED-NEXT: br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; PRED: middle.block: |
| ; PRED-NEXT: br i1 true, label [[FOR_COND_CLEANUP312_LOOPEXIT:%.*]], label [[SCALAR_PH]] |
| ; PRED: scalar.ph: |
| ; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[SRC]], [[ENTRY:%.*]] ] |
| ; PRED-NEXT: br label [[FOR_BODY313:%.*]] |
| ; PRED: loop.header: |
| ; PRED-NEXT: [[__BEGIN3_01197:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INCDEC_PTR329:%.*]], [[IF_END327:%.*]] ] |
| ; PRED-NEXT: [[CMP315_NOT:%.*]] = icmp sgt i32 [[A]], 0 |
| ; PRED-NEXT: br i1 [[CMP315_NOT]], label [[IF_END327]], label [[IF_THEN316:%.*]] |
| ; PRED: if: |
| ; PRED-NEXT: br label [[IF_END327_SINK_SPLIT:%.*]] |
| ; PRED: else: |
| ; PRED-NEXT: store i32 0, ptr [[DST]], align 4 |
| ; PRED-NEXT: br label [[IF_END327]] |
| ; PRED: loop.latch: |
| ; PRED-NEXT: [[INCDEC_PTR329]] = getelementptr inbounds i8, ptr [[__BEGIN3_01197]], i64 4 |
| ; PRED-NEXT: [[CMP311_NOT:%.*]] = icmp eq ptr [[__BEGIN3_01197]], [[I]] |
| ; PRED-NEXT: br i1 [[CMP311_NOT]], label [[FOR_COND_CLEANUP312_LOOPEXIT]], label [[FOR_BODY313]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; PRED: exit: |
| ; PRED-NEXT: ret void |
| ; |
| entry: |
| br label %loop.header |
| |
| loop.header: |
| %ptr.iv = phi ptr [ %src, %entry ], [ %ptr.iv.next, %loop.latch ] |
| %cmp315.not = icmp sgt i32 %a, 0 |
| br i1 %cmp315.not, label %loop.latch, label %if |
| |
| if: |
| br label %else |
| |
| else: |
| store i32 0, ptr %dst, align 4 |
| br label %loop.latch |
| |
| loop.latch: |
| %ptr.iv.next = getelementptr inbounds i8, ptr %ptr.iv, i64 4 |
| %cmp311.not = icmp eq ptr %ptr.iv, %I |
| br i1 %cmp311.not, label %exit, label %loop.header |
| |
| exit: |
| ret void |
| } |
| |
| define void @latch_branch_cost(ptr %dst) { |
| ; DEFAULT-LABEL: define void @latch_branch_cost( |
| ; DEFAULT-SAME: ptr [[DST:%.*]]) { |
| ; DEFAULT-NEXT: iter.check: |
| ; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; DEFAULT: vector.main.loop.iter.check: |
| ; DEFAULT-NEXT: br i1 false, label [[VEC_EPILOG_PH:%.*]], label [[VECTOR_PH1:%.*]] |
| ; DEFAULT: vector.ph: |
| ; DEFAULT-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; DEFAULT: vector.body: |
| ; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] |
| ; DEFAULT-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 |
| ; DEFAULT-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 16 |
| ; DEFAULT-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP0]] |
| ; DEFAULT-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP1]] |
| ; DEFAULT-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP2]], i32 0 |
| ; DEFAULT-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP2]], i32 16 |
| ; DEFAULT-NEXT: store <16 x i8> zeroinitializer, ptr [[TMP6]], align 1 |
| ; DEFAULT-NEXT: store <16 x i8> zeroinitializer, ptr [[TMP5]], align 1 |
| ; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32 |
| ; DEFAULT-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96 |
| ; DEFAULT-NEXT: br i1 [[TMP4]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] |
| ; DEFAULT: middle.block: |
| ; DEFAULT-NEXT: br i1 false, label [[FOR_END:%.*]], label [[VEC_EPILOG_ITER_CHECK:%.*]] |
| ; DEFAULT: vec.epilog.iter.check: |
| ; DEFAULT-NEXT: br i1 false, label [[SCALAR_PH]], label [[VEC_EPILOG_PH]] |
| ; DEFAULT: vec.epilog.ph: |
| ; DEFAULT-NEXT: [[VEC_EPILOG_RESUME_VAL:%.*]] = phi i64 [ 96, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[VECTOR_PH]] ] |
| ; DEFAULT-NEXT: br label [[VEC_EPILOG_VECTOR_BODY:%.*]] |
| ; DEFAULT: vec.epilog.vector.body: |
| ; DEFAULT-NEXT: [[INDEX1:%.*]] = phi i64 [ [[VEC_EPILOG_RESUME_VAL]], [[VEC_EPILOG_PH]] ], [ [[INDEX_NEXT2:%.*]], [[VEC_EPILOG_VECTOR_BODY]] ] |
| ; DEFAULT-NEXT: [[TMP7:%.*]] = add i64 [[INDEX1]], 0 |
| ; DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]] |
| ; DEFAULT-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i32 0 |
| ; DEFAULT-NEXT: store <4 x i8> zeroinitializer, ptr [[TMP9]], align 1 |
| ; DEFAULT-NEXT: [[INDEX_NEXT2]] = add nuw i64 [[INDEX1]], 4 |
| ; DEFAULT-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT2]], 100 |
| ; DEFAULT-NEXT: br i1 [[TMP10]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]] |
| ; DEFAULT: vec.epilog.middle.block: |
| ; DEFAULT-NEXT: br i1 true, label [[FOR_END]], label [[SCALAR_PH]] |
| ; DEFAULT: vec.epilog.scalar.ph: |
| ; DEFAULT-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, [[VEC_EPILOG_MIDDLE_BLOCK]] ], [ 96, [[VEC_EPILOG_ITER_CHECK]] ], [ 0, [[ITER_CHECK:%.*]] ] |
| ; DEFAULT-NEXT: br label [[FOR_BODY:%.*]] |
| ; DEFAULT: loop: |
| ; DEFAULT-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] |
| ; DEFAULT-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDVARS_IV]] |
| ; DEFAULT-NEXT: store i8 0, ptr [[ARRAYIDX]], align 1 |
| ; DEFAULT-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 |
| ; DEFAULT-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 |
| ; DEFAULT-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]] |
| ; DEFAULT: exit: |
| ; DEFAULT-NEXT: ret void |
| ; |
| ; PRED-LABEL: define void @latch_branch_cost( |
| ; PRED-SAME: ptr [[DST:%.*]]) { |
| ; PRED-NEXT: entry: |
| ; PRED-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] |
| ; PRED: vector.ph: |
| ; PRED-NEXT: br label [[VECTOR_BODY:%.*]] |
| ; PRED: vector.body: |
| ; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE6:%.*]] ] |
| ; PRED-NEXT: [[VEC_IND:%.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[PRED_STORE_CONTINUE6]] ] |
| ; PRED-NEXT: [[TMP0:%.*]] = icmp ule <4 x i64> [[VEC_IND]], <i64 99, i64 99, i64 99, i64 99> |
| ; PRED-NEXT: [[TMP1:%.*]] = extractelement <4 x i1> [[TMP0]], i32 0 |
| ; PRED-NEXT: br i1 [[TMP1]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] |
| ; PRED: pred.store.if: |
| ; PRED-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 0 |
| ; PRED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP2]] |
| ; PRED-NEXT: store i8 0, ptr [[TMP3]], align 1 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE]] |
| ; PRED: pred.store.continue: |
| ; PRED-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP0]], i32 1 |
| ; PRED-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] |
| ; PRED: pred.store.if1: |
| ; PRED-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 1 |
| ; PRED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP5]] |
| ; PRED-NEXT: store i8 0, ptr [[TMP6]], align 1 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE2]] |
| ; PRED: pred.store.continue2: |
| ; PRED-NEXT: [[TMP7:%.*]] = extractelement <4 x i1> [[TMP0]], i32 2 |
| ; PRED-NEXT: br i1 [[TMP7]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] |
| ; PRED: pred.store.if3: |
| ; PRED-NEXT: [[TMP8:%.*]] = add i64 [[INDEX]], 2 |
| ; PRED-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP8]] |
| ; PRED-NEXT: store i8 0, ptr [[TMP9]], align 1 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE4]] |
| ; PRED: pred.store.continue4: |
| ; PRED-NEXT: [[TMP10:%.*]] = extractelement <4 x i1> [[TMP0]], i32 3 |
| ; PRED-NEXT: br i1 [[TMP10]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] |
| ; PRED: pred.store.if5: |
| ; PRED-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 3 |
| ; PRED-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]] |
| ; PRED-NEXT: store i8 0, ptr [[TMP12]], align 1 |
| ; PRED-NEXT: br label [[PRED_STORE_CONTINUE6]] |
| ; PRED: pred.store.continue6: |
| ; PRED-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4 |
| ; PRED-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], <i64 4, i64 4, i64 4, i64 4> |
| ; PRED-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 |
| ; PRED-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| ; PRED: middle.block: |
| ; PRED-NEXT: br i1 true, label [[FOR_END:%.*]], label [[SCALAR_PH]] |
| ; PRED: scalar.ph: |
| ; PRED-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] |
| ; PRED-NEXT: br label [[FOR_BODY:%.*]] |
| ; PRED: loop: |
| ; PRED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] |
| ; PRED-NEXT: [[ARRAYIDX:%.*]] = getelementptr i8, ptr [[DST]], i64 [[INDVARS_IV]] |
| ; PRED-NEXT: store i8 0, ptr [[ARRAYIDX]], align 1 |
| ; PRED-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1 |
| ; PRED-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100 |
| ; PRED-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] |
| ; PRED: exit: |
| ; PRED-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| %gep = getelementptr i8, ptr %dst, i64 %iv |
| store i8 0, ptr %gep, align 1 |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv.next, 100 |
| br i1 %ec, label %exit, label %loop |
| |
| exit: |
| ret void |
| } |
| |
| ;. |
| ; DEFAULT: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; DEFAULT: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; DEFAULT: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; DEFAULT: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} |
| ; DEFAULT: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} |
| ; DEFAULT: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]} |
| ; DEFAULT: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]} |
| ; DEFAULT: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]} |
| ; DEFAULT: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]} |
| ; DEFAULT: [[LOOP9]] = distinct !{[[LOOP9]], [[META2]], [[META1]]} |
| ; DEFAULT: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]} |
| ; DEFAULT: [[LOOP11]] = distinct !{[[LOOP11]], [[META1]], [[META2]]} |
| ; DEFAULT: [[LOOP12]] = distinct !{[[LOOP12]], [[META2]], [[META1]]} |
| ;. |
| ; PRED: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; PRED: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; PRED: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; PRED: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]} |
| ; PRED: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]} |
| ; PRED: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]} |
| ; PRED: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]} |
| ; PRED: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]} |
| ;. |
