| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=riscv32 -mattr=+m,+v -run-pass=regbankselect \ |
| # RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \ |
| # RUN: -o - | FileCheck -check-prefix=RV32I %s |
| # RUN: llc -mtriple=riscv64 -mattr=+m,+v -run-pass=regbankselect \ |
| # RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \ |
| # RUN: -o - | FileCheck -check-prefix=RV64I %s |
| --- |
| name: implicitdef_nxv1i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv1i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv1i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 1 x s8>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv2i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv2i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv2i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 2 x s8>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv4i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv4i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 4 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv4i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 4 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 4 x s8>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv8i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv8i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 8 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv8i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 8 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 8 x s8>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv16i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv16i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 16 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m2 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv16i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 16 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m2 |
| %0:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF |
| $v8m2 = COPY %0(<vscale x 16 x s8>) |
| PseudoRET implicit $v8m2 |
| ... |
| --- |
| name: implicitdef_nxv32i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv32i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 32 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m4 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv32i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 32 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m4 |
| %0:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF |
| $v8m4 = COPY %0(<vscale x 32 x s8>) |
| PseudoRET implicit $v8m4 |
| ... |
| --- |
| name: implicitdef_nxv64i8 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv64i8 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 64 x s8>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv64i8 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 64 x s8>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m8 |
| %0:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF |
| $v8m8 = COPY %0(<vscale x 64 x s8>) |
| PseudoRET implicit $v8m8 |
| ... |
| --- |
| name: implicitdef_nxv1i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv1i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv1i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 1 x s16>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv2i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv2i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv2i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 2 x s16>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv4i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv4i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 4 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv4i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 4 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 4 x s16>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv8i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv8i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 8 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m2 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv8i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 8 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m2 |
| %0:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF |
| $v8m2 = COPY %0(<vscale x 8 x s16>) |
| PseudoRET implicit $v8m2 |
| ... |
| --- |
| name: implicitdef_nxv16i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv16i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 16 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m4 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv16i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 16 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m4 |
| %0:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF |
| $v8m4 = COPY %0(<vscale x 16 x s16>) |
| PseudoRET implicit $v8m4 |
| ... |
| --- |
| name: implicitdef_nxv32i16 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv32i16 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 32 x s16>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv32i16 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 32 x s16>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m8 |
| %0:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF |
| $v8m8 = COPY %0(<vscale x 32 x s16>) |
| PseudoRET implicit $v8m8 |
| ... |
| --- |
| name: implicitdef_nxv1i32 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv1i32 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s32>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv1i32 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s32>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 1 x s32>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv2i32 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv2i32 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s32>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv2i32 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 2 x s32>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 2 x s32>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv4i32 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv4i32 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 4 x s32>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m2 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv4i32 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 4 x s32>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m2 |
| %0:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF |
| $v8m2 = COPY %0(<vscale x 4 x s32>) |
| PseudoRET implicit $v8m2 |
| ... |
| --- |
| name: implicitdef_nxv8i32 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv8i32 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 8 x s32>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m4 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv8i32 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 8 x s32>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m4 |
| %0:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF |
| $v8m4 = COPY %0(<vscale x 8 x s32>) |
| PseudoRET implicit $v8m4 |
| ... |
| --- |
| name: implicitdef_nxv16i32 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv16i32 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 16 x s32>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv16i32 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 16 x s32>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m8 |
| %0:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF |
| $v8m8 = COPY %0(<vscale x 16 x s32>) |
| PseudoRET implicit $v8m8 |
| ... |
| --- |
| name: implicitdef_nxv1i64 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv1i64 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s64>) |
| ; RV32I-NEXT: PseudoRET implicit $v8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv1i64 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s64>) |
| ; RV64I-NEXT: PseudoRET implicit $v8 |
| %0:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF |
| $v8 = COPY %0(<vscale x 1 x s64>) |
| PseudoRET implicit $v8 |
| ... |
| --- |
| name: implicitdef_nxv2i64 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv2i64 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 2 x s64>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m2 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv2i64 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m2 = COPY [[DEF]](<vscale x 2 x s64>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m2 |
| %0:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF |
| $v8m2 = COPY %0(<vscale x 2 x s64>) |
| PseudoRET implicit $v8m2 |
| ... |
| --- |
| name: implicitdef_nxv4i64 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv4i64 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 4 x s64>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m4 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv4i64 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m4 = COPY [[DEF]](<vscale x 4 x s64>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m4 |
| %0:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF |
| $v8m4 = COPY %0(<vscale x 4 x s64>) |
| PseudoRET implicit $v8m4 |
| ... |
| --- |
| name: implicitdef_nxv8i64 |
| legalized: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| ; RV32I-LABEL: name: implicitdef_nxv8i64 |
| ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF |
| ; RV32I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 8 x s64>) |
| ; RV32I-NEXT: PseudoRET implicit $v8m8 |
| ; |
| ; RV64I-LABEL: name: implicitdef_nxv8i64 |
| ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF |
| ; RV64I-NEXT: $v8m8 = COPY [[DEF]](<vscale x 8 x s64>) |
| ; RV64I-NEXT: PseudoRET implicit $v8m8 |
| %0:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF |
| $v8m8 = COPY %0(<vscale x 8 x s64>) |
| PseudoRET implicit $v8m8 |
| ... |