llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-or.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=legalizer %s -o - | FileCheck %s
---
name:            test_nxv1i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv1i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 1 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 1 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 1 x s8>) = COPY $v8
    %1:_(<vscale x 1 x s8>) = COPY $v9
    %2:_(<vscale x 1 x s8>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 1 x s8>)
    PseudoRET implicit $v8

...
---
name:            test_nxv2i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv2i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 2 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 2 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 2 x s8>) = COPY $v8
    %1:_(<vscale x 2 x s8>) = COPY $v9
    %2:_(<vscale x 2 x s8>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 2 x s8>)
    PseudoRET implicit $v8

...
---
name:            test_nxv4i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv4i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 4 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 4 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 4 x s8>) = COPY $v8
    %1:_(<vscale x 4 x s8>) = COPY $v9
    %2:_(<vscale x 4 x s8>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 4 x s8>)
    PseudoRET implicit $v8

...
---
name:            test_nxv8i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv8i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 8 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 8 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 8 x s8>) = COPY $v8
    %1:_(<vscale x 8 x s8>) = COPY $v9
    %2:_(<vscale x 8 x s8>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 8 x s8>)
    PseudoRET implicit $v8

...
---
name:            test_nxv16i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv16i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8m2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v10m2
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 16 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m2 = COPY [[OR]](<vscale x 16 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8m2
    %0:_(<vscale x 16 x s8>) = COPY $v8m2
    %1:_(<vscale x 16 x s8>) = COPY $v10m2
    %2:_(<vscale x 16 x s8>) = G_OR %0, %1
    $v8m2 = COPY %2(<vscale x 16 x s8>)
    PseudoRET implicit $v8m2

...
---
name:            test_nxv32i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv32i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v8m4
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v12m4
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 32 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m4 = COPY [[OR]](<vscale x 32 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8m4
    %0:_(<vscale x 32 x s8>) = COPY $v8m4
    %1:_(<vscale x 32 x s8>) = COPY $v12m4
    %2:_(<vscale x 32 x s8>) = G_OR %0, %1
    $v8m4 = COPY %2(<vscale x 32 x s8>)
    PseudoRET implicit $v8m4

...
---
name:            test_nxv64i8
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv64i8
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 64 x s8>) = COPY $v8m8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 64 x s8>) = COPY $v16m8
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 64 x s8>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m8 = COPY [[OR]](<vscale x 64 x s8>)
    ; CHECK-NEXT: PseudoRET implicit $v8m8
    %0:_(<vscale x 64 x s8>) = COPY $v8m8
    %1:_(<vscale x 64 x s8>) = COPY $v16m8
    %2:_(<vscale x 64 x s8>) = G_OR %0, %1
    $v8m8 = COPY %2(<vscale x 64 x s8>)
    PseudoRET implicit $v8m8

...
---
name:            test_nxv1i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv1i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 1 x s16>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 1 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 1 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 1 x s16>) = COPY $v8
    %1:_(<vscale x 1 x s16>) = COPY $v9
    %2:_(<vscale x 1 x s16>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 1 x s16>)
    PseudoRET implicit $v8

...
---
name:            test_nxv2i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv2i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 2 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 2 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 2 x s16>) = COPY $v8
    %1:_(<vscale x 2 x s16>) = COPY $v9
    %2:_(<vscale x 2 x s16>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 2 x s16>)
    PseudoRET implicit $v8

...
---
name:            test_nxv4i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv4i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 4 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 4 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 4 x s16>) = COPY $v8
    %1:_(<vscale x 4 x s16>) = COPY $v9
    %2:_(<vscale x 4 x s16>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 4 x s16>)
    PseudoRET implicit $v8

...
---
name:            test_nxv8i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv8i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8m2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v10m2
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 8 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m2 = COPY [[OR]](<vscale x 8 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8m2
    %0:_(<vscale x 8 x s16>) = COPY $v8m2
    %1:_(<vscale x 8 x s16>) = COPY $v10m2
    %2:_(<vscale x 8 x s16>) = G_OR %0, %1
    $v8m2 = COPY %2(<vscale x 8 x s16>)
    PseudoRET implicit $v8m2

...
---
name:            test_nxv16i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv16i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8m4
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v12m4
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 16 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m4 = COPY [[OR]](<vscale x 16 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8m4
    %0:_(<vscale x 16 x s16>) = COPY $v8m4
    %1:_(<vscale x 16 x s16>) = COPY $v12m4
    %2:_(<vscale x 16 x s16>) = G_OR %0, %1
    $v8m4 = COPY %2(<vscale x 16 x s16>)
    PseudoRET implicit $v8m4

...
---
name:            test_nxv32i16
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv32i16
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 32 x s16>) = COPY $v8m8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 32 x s16>) = COPY $v16m8
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 32 x s16>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m8 = COPY [[OR]](<vscale x 32 x s16>)
    ; CHECK-NEXT: PseudoRET implicit $v8m8
    %0:_(<vscale x 32 x s16>) = COPY $v8m8
    %1:_(<vscale x 32 x s16>) = COPY $v16m8
    %2:_(<vscale x 32 x s16>) = G_OR %0, %1
    $v8m8 = COPY %2(<vscale x 32 x s16>)
    PseudoRET implicit $v8m8

...
---
name:            test_nxv1i32
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv1i32
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 1 x s32>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 1 x s32>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 1 x s32>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 1 x s32>) = COPY $v8
    %1:_(<vscale x 1 x s32>) = COPY $v9
    %2:_(<vscale x 1 x s32>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 1 x s32>)
    PseudoRET implicit $v8

...
---
name:            test_nxv2i32
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv2i32
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 2 x s32>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 2 x s32>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 2 x s32>) = COPY $v8
    %1:_(<vscale x 2 x s32>) = COPY $v9
    %2:_(<vscale x 2 x s32>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 2 x s32>)
    PseudoRET implicit $v8

...
---
name:            test_nxv4i32
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv4i32
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8m2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v10m2
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 4 x s32>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m2 = COPY [[OR]](<vscale x 4 x s32>)
    ; CHECK-NEXT: PseudoRET implicit $v8m2
    %0:_(<vscale x 4 x s32>) = COPY $v8m2
    %1:_(<vscale x 4 x s32>) = COPY $v10m2
    %2:_(<vscale x 4 x s32>) = G_OR %0, %1
    $v8m2 = COPY %2(<vscale x 4 x s32>)
    PseudoRET implicit $v8m2

...
---
name:            test_nxv8i32
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv8i32
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8m4
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v12m4
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 8 x s32>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m4 = COPY [[OR]](<vscale x 8 x s32>)
    ; CHECK-NEXT: PseudoRET implicit $v8m4
    %0:_(<vscale x 8 x s32>) = COPY $v8m4
    %1:_(<vscale x 8 x s32>) = COPY $v12m4
    %2:_(<vscale x 8 x s32>) = G_OR %0, %1
    $v8m4 = COPY %2(<vscale x 8 x s32>)
    PseudoRET implicit $v8m4

...
---
name:            test_nxv16i32
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv16i32
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v8m8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v16m8
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 16 x s32>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m8 = COPY [[OR]](<vscale x 16 x s32>)
    ; CHECK-NEXT: PseudoRET implicit $v8m8
    %0:_(<vscale x 16 x s32>) = COPY $v8m8
    %1:_(<vscale x 16 x s32>) = COPY $v16m8
    %2:_(<vscale x 16 x s32>) = G_OR %0, %1
    $v8m8 = COPY %2(<vscale x 16 x s32>)
    PseudoRET implicit $v8m8

...
---
name:            test_nxv1i64
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv1i64
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 1 x s64>) = COPY $v8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 1 x s64>) = COPY $v9
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 1 x s64>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8 = COPY [[OR]](<vscale x 1 x s64>)
    ; CHECK-NEXT: PseudoRET implicit $v8
    %0:_(<vscale x 1 x s64>) = COPY $v8
    %1:_(<vscale x 1 x s64>) = COPY $v9
    %2:_(<vscale x 1 x s64>) = G_OR %0, %1
    $v8 = COPY %2(<vscale x 1 x s64>)
    PseudoRET implicit $v8

...
---
name:            test_nxv2i64
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv2i64
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $v8m2
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s64>) = COPY $v10m2
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 2 x s64>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m2 = COPY [[OR]](<vscale x 2 x s64>)
    ; CHECK-NEXT: PseudoRET implicit $v8m2
    %0:_(<vscale x 2 x s64>) = COPY $v8m2
    %1:_(<vscale x 2 x s64>) = COPY $v10m2
    %2:_(<vscale x 2 x s64>) = G_OR %0, %1
    $v8m2 = COPY %2(<vscale x 2 x s64>)
    PseudoRET implicit $v8m2

...
---
name:            test_nxv4i64
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv4i64
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s64>) = COPY $v8m4
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s64>) = COPY $v12m4
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 4 x s64>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m4 = COPY [[OR]](<vscale x 4 x s64>)
    ; CHECK-NEXT: PseudoRET implicit $v8m4
    %0:_(<vscale x 4 x s64>) = COPY $v8m4
    %1:_(<vscale x 4 x s64>) = COPY $v12m4
    %2:_(<vscale x 4 x s64>) = G_OR %0, %1
    $v8m4 = COPY %2(<vscale x 4 x s64>)
    PseudoRET implicit $v8m4

...
---
name:            test_nxv8i64
body:             |
  bb.0.entry:

    ; CHECK-LABEL: name: test_nxv8i64
    ; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v8m8
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s64>) = COPY $v16m8
    ; CHECK-NEXT: [[OR:%[0-9]+]]:_(<vscale x 8 x s64>) = G_OR [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $v8m8 = COPY [[OR]](<vscale x 8 x s64>)
    ; CHECK-NEXT: PseudoRET implicit $v8m8
    %0:_(<vscale x 8 x s64>) = COPY $v8m8
    %1:_(<vscale x 8 x s64>) = COPY $v16m8
    %2:_(<vscale x 8 x s64>) = G_OR %0, %1
    $v8m8 = COPY %2(<vscale x 8 x s64>)
    PseudoRET implicit $v8m8

...