| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast -o - %s | FileCheck -check-prefix=SPILLED %s |
| # RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=regallocfast,si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=EXPANDED %s |
| |
| # Make sure spill/restore of 352 bit registers works. |
| |
| --- |
| name: spill_restore_sgpr352 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 |
| stackPtrOffsetReg: $sgpr32 |
| body: | |
| ; SPILLED-LABEL: name: spill_restore_sgpr352 |
| ; SPILLED: bb.0: |
| ; SPILLED-NEXT: successors: %bb.1(0x80000000) |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; SPILLED-NEXT: SI_SPILL_S352_SAVE killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s352) into %stack.0, align 4, addrspace 5) |
| ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: bb.1: |
| ; SPILLED-NEXT: successors: %bb.2(0x80000000) |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: S_NOP 1 |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: bb.2: |
| ; SPILLED-NEXT: $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 = SI_SPILL_S352_RESTORE %stack.0, implicit $exec, implicit $sgpr32 :: (load (s352) from %stack.0, align 4, addrspace 5) |
| ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; |
| ; EXPANDED-LABEL: name: spill_restore_sgpr352 |
| ; EXPANDED: bb.0: |
| ; EXPANDED-NEXT: successors: %bb.1(0x80000000) |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF |
| ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, [[DEF]], implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14, implicit $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr6, 2, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr7, 3, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr8, 4, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr9, 5, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr10, 6, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr11, 7, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr12, 8, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR $sgpr13, 9, [[DEF]] |
| ; EXPANDED-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr14, 10, [[DEF]], implicit killed $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: bb.1: |
| ; EXPANDED-NEXT: successors: %bb.2(0x80000000) |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: S_NOP 1 |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: bb.2: |
| ; EXPANDED-NEXT: $sgpr4 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 0, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| ; EXPANDED-NEXT: $sgpr5 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 1 |
| ; EXPANDED-NEXT: $sgpr6 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 2 |
| ; EXPANDED-NEXT: $sgpr7 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 3 |
| ; EXPANDED-NEXT: $sgpr8 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 4 |
| ; EXPANDED-NEXT: $sgpr9 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 5 |
| ; EXPANDED-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 6 |
| ; EXPANDED-NEXT: $sgpr11 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 7 |
| ; EXPANDED-NEXT: $sgpr12 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 8 |
| ; EXPANDED-NEXT: $sgpr13 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 9 |
| ; EXPANDED-NEXT: $sgpr14 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 10 |
| ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14 |
| bb.0: |
| S_NOP 0, implicit-def %0:sgpr_352 |
| S_CBRANCH_SCC1 implicit undef $scc, %bb.1 |
| |
| bb.1: |
| S_NOP 1 |
| |
| bb.2: |
| S_NOP 0, implicit %0 |
| ... |
| |
| --- |
| name: spill_restore_vgpr352 |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3 |
| stackPtrOffsetReg: $sgpr32 |
| body: | |
| ; SPILLED-LABEL: name: spill_restore_vgpr352 |
| ; SPILLED: bb.0: |
| ; SPILLED-NEXT: successors: %bb.1(0x80000000) |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 |
| ; SPILLED-NEXT: SI_SPILL_V352_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10, %stack.0, $sgpr32, 0, implicit $exec :: (store (s352) into %stack.0, align 4, addrspace 5) |
| ; SPILLED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: bb.1: |
| ; SPILLED-NEXT: successors: %bb.2(0x80000000) |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: S_NOP 1 |
| ; SPILLED-NEXT: {{ $}} |
| ; SPILLED-NEXT: bb.2: |
| ; SPILLED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 = SI_SPILL_V352_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s352) from %stack.0, align 4, addrspace 5) |
| ; SPILLED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 |
| ; |
| ; EXPANDED-LABEL: name: spill_restore_vgpr352 |
| ; EXPANDED: bb.0: |
| ; EXPANDED-NEXT: successors: %bb.1(0x80000000) |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 |
| ; EXPANDED-NEXT: SI_SPILL_V352_SAVE killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10, %stack.0, $sgpr32, 0, implicit $exec :: (store (s352) into %stack.0, align 4, addrspace 5) |
| ; EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: bb.1: |
| ; EXPANDED-NEXT: successors: %bb.2(0x80000000) |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: S_NOP 1 |
| ; EXPANDED-NEXT: {{ $}} |
| ; EXPANDED-NEXT: bb.2: |
| ; EXPANDED-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 = SI_SPILL_V352_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s352) from %stack.0, align 4, addrspace 5) |
| ; EXPANDED-NEXT: S_NOP 0, implicit killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10 |
| bb.0: |
| S_NOP 0, implicit-def %0:vreg_352 |
| S_CBRANCH_SCC1 implicit undef $scc, %bb.1 |
| |
| bb.1: |
| S_NOP 1 |
| |
| bb.2: |
| S_NOP 0, implicit %0 |
| ... |