llvm/test/CodeGen/AMDGPU/regcoalesce-cannot-join-failures.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=register-coalescer -verify-machineinstrs -o - %s | FileCheck %s

---
name: couldnt_join_subrange_implicit_def_pred_block
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: couldnt_join_subrange_implicit_def_pred_block
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   undef [[DEF:%[0-9]+]].sub0:sreg_64_xexec = IMPLICIT_DEF
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]].sub1:sreg_64_xexec = COPY [[DEF]].sub0
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   S_ENDPGM 0, implicit [[DEF]]
  bb.0:
    successors: %bb.1

    undef %0.sub0:sreg_64_xexec = IMPLICIT_DEF

  bb.1:
    successors: %bb.2

    %1:sreg_64 = COPY %0:sreg_64_xexec
    %0.sub1:sreg_64_xexec = COPY %0.sub0:sreg_64_xexec
    S_BRANCH %bb.2

  bb.2:
    dead %2:sreg_32_xm0 = COPY %0.sub0:sreg_64_xexec
    S_ENDPGM 0, implicit killed %1

...
---
name: couldnt_join_subrange_no_implicit_def_inst
tracksRegLiveness: true
body:             |
  bb.0:
    ; CHECK-LABEL: name: couldnt_join_subrange_no_implicit_def_inst
    ; CHECK: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = S_MOV_B32 0
    ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = COPY [[S_MOV_B32_]].sub0
    ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]].sub1
    undef %0.sub0:sreg_64 = S_MOV_B32 0
    %1:sreg_64 = COPY %0:sreg_64
    %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
    S_ENDPGM 0, implicit %1.sub1:sreg_64

...
---
name: couldnt_join_subrange0
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: couldnt_join_subrange0
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   undef [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = S_MOV_B32 -1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64 = S_MOV_B32 0
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY [[S_MOV_B32_]]
  ; CHECK-NEXT:   dead [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64 = COPY [[S_MOV_B32_]].sub0
  ; CHECK-NEXT:   S_ENDPGM 0, implicit [[COPY]].sub1
  bb.0:
    successors: %bb.1
    undef %0.sub1:sreg_64 = S_MOV_B32 -1

  bb.1:
    %0.sub0:sreg_64 = S_MOV_B32 0
    %1:sreg_64 = COPY %0:sreg_64
    dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
    S_ENDPGM 0, implicit %1.sub1:sreg_64

...
---
name: lanes_not_tracked_subreg_join_couldnt_join_subrange
tracksRegLiveness: true
body:             |
  bb.0:

    ; CHECK-LABEL: name: lanes_not_tracked_subreg_join_couldnt_join_subrange
    ; CHECK: undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64_xexec = S_MOV_B32 0
    ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64_xexec = S_MOV_B32 0
    ; CHECK-NEXT: S_NOP 0, implicit [[S_MOV_B32_]].sub1
    ; CHECK-NEXT: S_NOP 0, implicit [[S_MOV_B32_]]
    ; CHECK-NEXT: S_ENDPGM 0
    undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
    %1:sreg_64 = COPY %0
    %0.sub1:sreg_64_xexec = S_MOV_B32 0
    S_NOP 0, implicit %0.sub1
    S_NOP 0, implicit %1
    S_ENDPGM 0

...
---
name: couldnt_join_subrange1
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: couldnt_join_subrange1
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   undef [[S_MOV_B32_:%[0-9]+]].sub0:sreg_64_xexec = S_MOV_B32 0
  ; CHECK-NEXT:   [[S_MOV_B32_:%[0-9]+]].sub1:sreg_64_xexec = COPY [[S_MOV_B32_]].sub0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   S_NOP 0, implicit [[S_MOV_B32_]].sub1
  ; CHECK-NEXT:   S_ENDPGM 0, implicit [[S_MOV_B32_]]
  bb.0:
    successors: %bb.1

    undef %0.sub0:sreg_64_xexec = S_MOV_B32 0
    %1:sreg_64 = COPY %0
    %0.sub1:sreg_64_xexec = COPY %0.sub0

  bb.1:

    S_NOP 0, implicit %0.sub1
    S_ENDPGM 0, implicit %1

...