llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp-s32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=amdgcn -mcpu=gfx1150  -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s

---
name:            f32_olt
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f32_olt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr1
    ; GFX1150-NEXT: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(olt), [[COPY]](s32), [[COPY1]]
    ; GFX1150-NEXT: $sgpr0 = COPY [[FCMP]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s32) = COPY $sgpr1
    %2:_(s32) = G_FCMP floatpred(olt), %0(s32), %1
    $sgpr0 = COPY %2

...

---
name:            f16_olt
body:             |
  bb.1.entry:
    liveins: $sgpr0, $sgpr1

    ; GFX1150-LABEL: name: f16_olt
    ; GFX1150: liveins: $sgpr0, $sgpr1
    ; GFX1150-NEXT: {{  $}}
    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0
    ; GFX1150-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr1
    ; GFX1150-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
    ; GFX1150-NEXT: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(olt), [[TRUNC]](s16), [[TRUNC1]]
    ; GFX1150-NEXT: $sgpr0 = COPY [[FCMP]](s32)
    %0:_(s32) = COPY $sgpr0
    %1:_(s16) = G_TRUNC %0(s32)
    %2:_(s32) = COPY $sgpr1
    %3:_(s16) = G_TRUNC %2(s32)
    %4:_(s32) = G_FCMP floatpred(olt), %1(s16), %3
    $sgpr0 = COPY %4

...