llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

---
name:            test_f16_poszero_nsz
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f16_poszero_nsz
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %input:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s16) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: %res:_(s32) = G_ANYEXT [[FCANONICALIZE]](s16)
    ; CHECK-NEXT: $vgpr0 = COPY %res(s32)
    %0:_(s32) = COPY $vgpr0
    %input:_(s16) = G_TRUNC %0
    %cst:_(s16) = G_FCONSTANT half 0.0
    %sub:_(s16) = nsz G_FSUB %cst, %input
    %res:_(s32) = G_ANYEXT %sub
    $vgpr0 = COPY %res
...

---
name:            test_f16_poszero_nonsz_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f16_poszero_nonsz_nofold
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %input:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: %cst:_(s16) = G_FCONSTANT half 0xH0000
    ; CHECK-NEXT: %sub:_(s16) = G_FSUB %cst, %input
    ; CHECK-NEXT: %res:_(s32) = G_ANYEXT %sub(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %res(s32)
    %0:_(s32) = COPY $vgpr0
    %input:_(s16) = G_TRUNC %0
    %cst:_(s16) = G_FCONSTANT half 0.0
    %sub:_(s16) = G_FSUB %cst, %input
    %res:_(s32) = G_ANYEXT %sub
    $vgpr0 = COPY %res
...

---
name:            test_f16_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f16_negzero
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %input:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s16) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s16) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: %res:_(s32) = G_ANYEXT [[FCANONICALIZE]](s16)
    ; CHECK-NEXT: $vgpr0 = COPY %res(s32)
    %0:_(s32) = COPY $vgpr0
    %input:_(s16) = G_TRUNC %0
    %cst:_(s16) = G_FCONSTANT half -0.0
    %sub:_(s16) = G_FSUB %cst, %input
    %res:_(s32) = G_ANYEXT %sub
    $vgpr0 = COPY %res
...

---
name:            test_f32_poszero_nsz
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f32_poszero_nsz
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FCANONICALIZE]](s32)
    %input:_(s32) = COPY $vgpr0
    %cst:_(s32) = G_FCONSTANT float 0.0
    %sub:_(s32) = nsz G_FSUB %cst, %input
    $vgpr0 = COPY %sub
...

---
name:            test_f32_poszero_nonsz_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f32_poszero_nonsz_nofold
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %cst:_(s32) = G_FCONSTANT float 0.000000e+00
    ; CHECK-NEXT: %sub:_(s32) = G_FSUB %cst, %input
    ; CHECK-NEXT: $vgpr0 = COPY %sub(s32)
    %input:_(s32) = COPY $vgpr0
    %cst:_(s32) = G_FCONSTANT float 0.0
    %sub:_(s32) = G_FSUB %cst, %input
    $vgpr0 = COPY %sub
...

---
name:            test_f32_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0

    ; CHECK-LABEL: name: test_f32_negzero
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s32) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s32) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0 = COPY [[FCANONICALIZE]](s32)
    %input:_(s32) = COPY $vgpr0
    %cst:_(s32) = G_FCONSTANT float -0.0
    %sub:_(s32) = G_FSUB %cst, %input
    $vgpr0 = COPY %sub
...

---
name:            test_f64_poszero_nsz
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_f64_poszero_nsz
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[FCANONICALIZE]](s64)
    %input:_(s64) = COPY $vgpr0_vgpr1
    %cst:_(s64) = G_FCONSTANT double 0.0
    %sub:_(s64) = nsz G_FSUB %cst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_f64_poszero_nonsz_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_f64_poszero_nonsz_nofold
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: %cst:_(s64) = G_FCONSTANT double 0.000000e+00
    ; CHECK-NEXT: %sub:_(s64) = G_FSUB %cst, %input
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %sub(s64)
    %input:_(s64) = COPY $vgpr0_vgpr1
    %cst:_(s64) = G_FCONSTANT double 0.0
    %sub:_(s64) = G_FSUB %cst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_f64_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_f64_negzero
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(s64) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(s64) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(s64) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[FCANONICALIZE]](s64)
    %input:_(s64) = COPY $vgpr0_vgpr1
    %cst:_(s64) = G_FCONSTANT double -0.0
    %sub:_(s64) = G_FSUB %cst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_v4f16_poszero_nsz
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_v4f16_poszero_nsz
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s16>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s16>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[FCANONICALIZE]](<4 x s16>)
    %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    %cst:_(s16) = G_FCONSTANT half 0.0
    %veccst:_(<4 x s16>) = G_BUILD_VECTOR %cst, %cst, %cst, %cst
    %sub:_(<4 x s16>) = nsz G_FSUB %veccst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_v4f16_poszero_nonsz_nofold
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_v4f16_poszero_nonsz_nofold
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: %cst:_(s16) = G_FCONSTANT half 0xH0000
    ; CHECK-NEXT: %veccst:_(<4 x s16>) = G_BUILD_VECTOR %cst(s16), %cst(s16), %cst(s16), %cst(s16)
    ; CHECK-NEXT: %sub:_(<4 x s16>) = G_FSUB %veccst, %input
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %sub(<4 x s16>)
    %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    %cst:_(s16) = G_FCONSTANT half 0.0
    %veccst:_(<4 x s16>) = G_BUILD_VECTOR %cst, %cst, %cst, %cst
    %sub:_(<4 x s16>) = G_FSUB %veccst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_v4f16_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; CHECK-LABEL: name: test_v4f16_negzero
    ; CHECK: liveins: $vgpr0_vgpr1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s16>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s16>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[FCANONICALIZE]](<4 x s16>)
    %input:_(<4 x s16>) = COPY $vgpr0_vgpr1
    %cst:_(s16) = G_FCONSTANT half -0.0
    %veccst:_(<4 x s16>) = G_BUILD_VECTOR %cst, %cst, %cst, %cst
    %sub:_(<4 x s16>) = G_FSUB %veccst, %input
    $vgpr0_vgpr1 = COPY %sub
...

---
name:            test_v4f32
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v4f32
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s32>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s32>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<4 x s32>)
    %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s32) = G_FCONSTANT float 0.0
    %veccst:_(<4 x s32>) = G_BUILD_VECTOR %cst, %cst, %cst, %cst
    %sub:_(<4 x s32>) = nsz G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...

---
name:            test_v4f32_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v4f32_negzero
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s32>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s32>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<4 x s32>)
    %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s32) = G_FCONSTANT float -0.0
    %veccst:_(<4 x s32>) = G_BUILD_VECTOR %cst, %cst, %cst, %cst
    %sub:_(<4 x s32>) = G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...

---
name:            test_v4f32_negzero_undef_elt
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v4f32_negzero_undef_elt
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s32>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s32>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<4 x s32>)
    %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s32) = G_FCONSTANT float -0.0
    %undef:_(s32) = G_IMPLICIT_DEF
    %veccst:_(<4 x s32>) = G_BUILD_VECTOR %cst, %undef, %cst, %cst
    %sub:_(<4 x s32>) = G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...

---
name:            test_v4f32_poszero_undef_elt
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v4f32_poszero_undef_elt
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<4 x s32>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<4 x s32>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<4 x s32>)
    %input:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s32) = G_FCONSTANT float 0.0
    %undef:_(s32) = G_IMPLICIT_DEF
    %veccst:_(<4 x s32>) = G_BUILD_VECTOR %cst, %undef, %cst, %cst
    %sub:_(<4 x s32>) = nsz G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...

---
name:            test_v2f64
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v2f64
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<2 x s64>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<2 x s64>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<2 x s64>)
    %input:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s64) = G_FCONSTANT double 0.0
    %veccst:_(<2 x s64>) = G_BUILD_VECTOR %cst, %cst
    %sub:_(<2 x s64>) = nsz G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...

---
name:            test_v2f64_negzero
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; CHECK-LABEL: name: test_v2f64_negzero
    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %input:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; CHECK-NEXT: [[FNEG:%[0-9]+]]:_(<2 x s64>) = G_FNEG %input
    ; CHECK-NEXT: [[FCANONICALIZE:%[0-9]+]]:_(<2 x s64>) = G_FCANONICALIZE [[FNEG]]
    ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[FCANONICALIZE]](<2 x s64>)
    %input:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %cst:_(s64) = G_FCONSTANT double -0.0
    %veccst:_(<2 x s64>) = G_BUILD_VECTOR %cst, %cst
    %sub:_(<2 x s64>) = G_FSUB %veccst, %input
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %sub
...