| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GFX9 %s |
| # RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=VI %s |
| # RUN: llc -march=amdgcn -mcpu=hawaii -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=CI %s |
| # RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=SI %s |
| # RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GFX10 %s |
| # RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GFX10 %s |
| |
| --- |
| name: m0_gws_init0 |
| tracksRegLiveness: true |
| body: | |
| |
| bb.0: |
| liveins: $vgpr0 |
| ; GFX9-LABEL: name: m0_gws_init0 |
| ; GFX9: liveins: $vgpr0 |
| ; GFX9-NEXT: {{ $}} |
| ; GFX9-NEXT: $m0 = S_MOV_B32 -1 |
| ; GFX9-NEXT: S_NOP 0 |
| ; GFX9-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; VI-LABEL: name: m0_gws_init0 |
| ; VI: liveins: $vgpr0 |
| ; VI-NEXT: {{ $}} |
| ; VI-NEXT: $m0 = S_MOV_B32 -1 |
| ; VI-NEXT: S_NOP 0 |
| ; VI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; CI-LABEL: name: m0_gws_init0 |
| ; CI: liveins: $vgpr0 |
| ; CI-NEXT: {{ $}} |
| ; CI-NEXT: $m0 = S_MOV_B32 -1 |
| ; CI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; SI-LABEL: name: m0_gws_init0 |
| ; SI: liveins: $vgpr0 |
| ; SI-NEXT: {{ $}} |
| ; SI-NEXT: $m0 = S_MOV_B32 -1 |
| ; SI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; GFX10-LABEL: name: m0_gws_init0 |
| ; GFX10: liveins: $vgpr0 |
| ; GFX10-NEXT: {{ $}} |
| ; GFX10-NEXT: $m0 = S_MOV_B32 -1 |
| ; GFX10-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| $m0 = S_MOV_B32 -1 |
| DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| |
| ... |
| |
| --- |
| name: m0_gws_init1 |
| tracksRegLiveness: true |
| body: | |
| |
| bb.0: |
| ; GFX9-LABEL: name: m0_gws_init1 |
| ; GFX9: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX9-NEXT: $m0 = S_MOV_B32 -1 |
| ; GFX9-NEXT: S_NOP 0 |
| ; GFX9-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; VI-LABEL: name: m0_gws_init1 |
| ; VI: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; VI-NEXT: $m0 = S_MOV_B32 -1 |
| ; VI-NEXT: S_NOP 0 |
| ; VI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; CI-LABEL: name: m0_gws_init1 |
| ; CI: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; CI-NEXT: $m0 = S_MOV_B32 -1 |
| ; CI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; SI-LABEL: name: m0_gws_init1 |
| ; SI: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; SI-NEXT: $m0 = S_MOV_B32 -1 |
| ; SI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; GFX10-LABEL: name: m0_gws_init1 |
| ; GFX10: $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| ; GFX10-NEXT: $m0 = S_MOV_B32 -1 |
| ; GFX10-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| $vgpr0 = V_MOV_B32_e32 0, implicit $exec |
| $m0 = S_MOV_B32 -1 |
| DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| |
| ... |
| |
| # Test a typical situation where m0 needs to be set from a VGPR |
| # through readfirstlane |
| --- |
| name: m0_gws_readlane |
| tracksRegLiveness: true |
| body: | |
| |
| bb.0: |
| liveins: $vgpr0, $vgpr1 |
| |
| ; GFX9-LABEL: name: m0_gws_readlane |
| ; GFX9: liveins: $vgpr0, $vgpr1 |
| ; GFX9-NEXT: {{ $}} |
| ; GFX9-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| ; GFX9-NEXT: $m0 = S_MOV_B32 $sgpr0 |
| ; GFX9-NEXT: S_NOP 0 |
| ; GFX9-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; VI-LABEL: name: m0_gws_readlane |
| ; VI: liveins: $vgpr0, $vgpr1 |
| ; VI-NEXT: {{ $}} |
| ; VI-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| ; VI-NEXT: $m0 = S_MOV_B32 $sgpr0 |
| ; VI-NEXT: S_NOP 0 |
| ; VI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; CI-LABEL: name: m0_gws_readlane |
| ; CI: liveins: $vgpr0, $vgpr1 |
| ; CI-NEXT: {{ $}} |
| ; CI-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| ; CI-NEXT: $m0 = S_MOV_B32 $sgpr0 |
| ; CI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; SI-LABEL: name: m0_gws_readlane |
| ; SI: liveins: $vgpr0, $vgpr1 |
| ; SI-NEXT: {{ $}} |
| ; SI-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| ; SI-NEXT: $m0 = S_MOV_B32 $sgpr0 |
| ; SI-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| ; GFX10-LABEL: name: m0_gws_readlane |
| ; GFX10: liveins: $vgpr0, $vgpr1 |
| ; GFX10-NEXT: {{ $}} |
| ; GFX10-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| ; GFX10-NEXT: $m0 = S_MOV_B32 $sgpr0 |
| ; GFX10-NEXT: DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| $sgpr0 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec |
| $m0 = S_MOV_B32 $sgpr0 |
| DS_GWS_INIT $vgpr0, 0, implicit $m0, implicit $exec |
| |
| ... |