[VP] add S2H feature enablement add S2H feature enablement and kernel integration.
diff --git a/media_softlet/agnostic/Xe_R/Xe2_HPG/hw/mhw_state_heap_xe2_hpg.cpp b/media_softlet/agnostic/Xe_R/Xe2_HPG/hw/mhw_state_heap_xe2_hpg.cpp index 5ac02a0..b48c6f6 100644 --- a/media_softlet/agnostic/Xe_R/Xe2_HPG/hw/mhw_state_heap_xe2_hpg.cpp +++ b/media_softlet/agnostic/Xe_R/Xe2_HPG/hw/mhw_state_heap_xe2_hpg.cpp
@@ -197,7 +197,14 @@ MHW_NORMALMESSAGE("Feature Graph: Cache settings of Render SurfaceState: SurfaceType is %d, Surface width is %d, Surface height is %d,\ Surface format is %d, SurfaceMemoryObjectControlState %d, Index to Mocs table %d",pSurfaceState->DW0.SurfaceType, pSurfaceState->DW2.Width, pSurfaceState->DW2.Height, pSurfaceState->DW0.SurfaceFormat, pParams->dwCacheabilityControl, (pParams->dwCacheabilityControl >> 1) & 0x0000003f); - + if (pSurfaceState->DW0.SurfaceType == 2) // 3D surface + { + pSurfaceState->DW4.RenderTargetViewExtent = pParams->dwDepth - 1; + } + else + { + pSurfaceState->DW4.RenderTargetViewExtent = 0; + } pSurfaceState->DW4.RenderTargetAndSampleUnormRotation = pParams->RotationMode; pSurfaceState->DW5.XOffset = pParams->iXOffset >> 2; pSurfaceState->DW5.YOffset = pParams->iYOffset >> 2; @@ -659,6 +666,11 @@ pUnormSampler->DW2.IndirectStatePointer = pParam->Unorm.IndirectStateOffset >> MHW_SAMPLER_INDIRECT_SHIFT; } + + MHW_NORMALMESSAGE("SetSamplerState (3D) final dwords: DW0=0x%08X DW1=0x%08X DW2=0x%08X DW3=0x%08X TCX=%d TCY=%d TCZ=%d NonNormalizedCoordinateEnable=%d MinFilter=%d MagFilter=%d", + pUnormSampler->DW0.Value, pUnormSampler->DW1.Value, pUnormSampler->DW2.Value, pUnormSampler->DW3.Value, + (int)pUnormSampler->DW3.TcxAddressControlMode, (int)pUnormSampler->DW3.TcyAddressControlMode, (int)pUnormSampler->DW3.TczAddressControlMode, + (int)pUnormSampler->DW3.NonNormalizedCoordinateEnable, (int)pUnormSampler->DW0.MinModeFilter, (int)pUnormSampler->DW0.MagModeFilter); } else {
diff --git a/media_softlet/agnostic/common/vp/hal/bufferMgr/vp_resource_manager.cpp b/media_softlet/agnostic/common/vp/hal/bufferMgr/vp_resource_manager.cpp index 9ccee5a..184930b 100644 --- a/media_softlet/agnostic/common/vp/hal/bufferMgr/vp_resource_manager.cpp +++ b/media_softlet/agnostic/common/vp/hal/bufferMgr/vp_resource_manager.cpp
@@ -1382,6 +1382,7 @@ VP_PUBLIC_CHK_NOT_FOUND_RETURN(handle, &m_aiIntermediateSurface); } VP_SURFACE *&intermediateSurface = handle->second; + VP_PUBLIC_CHK_STATUS_RETURN(m_allocator.ReAllocateSurface( intermediateSurface, aiSurfaceSetting.second.surfaceName.c_str(), @@ -1395,19 +1396,46 @@ allocated, false, IsDeferredResourceDestroyNeeded(), - MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_RENDER)); + MOS_HW_RESOURCE_USAGE_VP_INTERNAL_READ_WRITE_RENDER, + MOS_TILE_UNSET_GMM, + MOS_MEMPOOL_VIDEOMEMORY, + false, + nullptr, + aiSurfaceSetting.second.depth)); surfSetting.surfGroup.insert(std::make_pair(aiSurfaceSetting.first, intermediateSurface)); if (allocated && aiSurfaceSetting.second.fillContentSize > 0) { + if (aiSurfaceSetting.second.fillContent == nullptr) + { + // Report which surface, since the weight/bias symbol behind it likely + // resolved to nullptr and the preceding ReAllocateSurface log alone doesn't + // identify it. + VP_PUBLIC_NORMALMESSAGE("AssignAiKernelResource: fillContent is null for surface '%s' (fillContentSize=%u) -- the weight/bias table symbol behind this surface likely resolved to nullptr.", + aiSurfaceSetting.second.surfaceName.c_str(), aiSurfaceSetting.second.fillContentSize); + } VP_PUBLIC_CHK_NULL_RETURN(aiSurfaceSetting.second.fillContent); VP_PUBLIC_CHK_VALUE_RETURN((aiSurfaceSetting.second.width * aiSurfaceSetting.second.height >= aiSurfaceSetting.second.fillContentSize), true); VP_PUBLIC_CHK_STATUS_RETURN(m_allocator.Write1DSurface(intermediateSurface, aiSurfaceSetting.second.fillContent, aiSurfaceSetting.second.fillContentSize)); } + + // Permanent -- buffer_compare's surfdump_index.py parses this exact + // "surface=... allocated=... gpuVa=..." format to map dumped surfaces back to real + // GPU addresses. Does not use GMM_RESOURCE_INFO::GetSizeAllocation() -- this file is + // compiled into both the full driver and the solo build, and the solo build's + // lightweight GMM_RESOURCE_INFO stand-in does not implement that method. +#if (_DEBUG || _RELEASE_INTERNAL) + if (intermediateSurface->osSurface != nullptr) + { + uint64_t gpuVa = m_osInterface.pfnGetResourceGfxAddress(&m_osInterface, &intermediateSurface->osSurface->OsResource); + VP_PUBLIC_NORMALMESSAGE("AssignAiKernelResource: surface='%s' surfType=%d allocated=%d gpuVa=0x%llx width=%u height=%u depth=%u format=%d", + aiSurfaceSetting.second.surfaceName.c_str(), (int)aiSurfaceSetting.first, (int)allocated, gpuVa, + aiSurfaceSetting.second.width, aiSurfaceSetting.second.height, aiSurfaceSetting.second.depth, (int)aiSurfaceSetting.second.format); + } +#endif } } - return MOS_STATUS_SUCCESS; }
diff --git a/media_softlet/agnostic/common/vp/hal/features/vp_ai_filter.cpp b/media_softlet/agnostic/common/vp/hal/features/vp_ai_filter.cpp index 7b87809..80f9ac2 100644 --- a/media_softlet/agnostic/common/vp/hal/features/vp_ai_filter.cpp +++ b/media_softlet/agnostic/common/vp/hal/features/vp_ai_filter.cpp
@@ -307,9 +307,11 @@ kernelParam.kernelStatefulSurfaces.insert(std::make_pair(uIndex, surfaceParam)); } } + VP_PUBLIC_NORMALMESSAGE("InitKrnParams: stageIndex=%u layerIndex=%u kernel=%s kernelBtisFromPool=%zu statefulSurfacesBound=%zu kernelArgsBound=%zu", + swAiParam.stageIndex, layerIndex, kernelParam.kernelName.c_str(), + kernelBtis.size(), kernelParam.kernelStatefulSurfaces.size(), kernelParam.kernelArgs.size()); krnParams.push_back(std::move(kernelParam)); } - return MOS_STATUS_SUCCESS; }
diff --git a/media_softlet/agnostic/common/vp/hal/packet/vp_ai_kernel_pipe.h b/media_softlet/agnostic/common/vp/hal/packet/vp_ai_kernel_pipe.h index ec0d47f..7f0918f 100644 --- a/media_softlet/agnostic/common/vp/hal/packet/vp_ai_kernel_pipe.h +++ b/media_softlet/agnostic/common/vp/hal/packet/vp_ai_kernel_pipe.h
@@ -42,6 +42,11 @@ MOS_TILE_TYPE tileType = MOS_TILE_Y; uint32_t width = 0; uint32_t height = 0; + // Depth for a genuine 3D-volume intermediate surface (resourceType=MOS_GFXRES_VOLUME, + // e.g. an image3d_t LUT). Default 0 matches VpAllocator::ReAllocateSurface's own default + // and preserves exact existing behavior for every current 2D caller (SR3/VFI/S2H backbone), + // none of which ever set this field. + uint32_t depth = 0; uint8_t *fillContent = nullptr; uint32_t fillContentSize = 0; };
diff --git a/media_softlet/agnostic/common/vp/hal/packet/vp_render_ai_kernel.cpp b/media_softlet/agnostic/common/vp/hal/packet/vp_render_ai_kernel.cpp index 5f6c6a4..0a03134 100644 --- a/media_softlet/agnostic/common/vp/hal/packet/vp_render_ai_kernel.cpp +++ b/media_softlet/agnostic/common/vp/hal/packet/vp_render_ai_kernel.cpp
@@ -296,6 +296,19 @@ VP_PUBLIC_CHK_NULL_RETURN(surfHandle->second); VP_PUBLIC_CHK_NULL_RETURN(surfHandle->second->osSurface); + // Permanent -- buffer_compare's curbe_index.py has no other source for + // resolved real GPU VA per stateless (buffer, non-BTI) surface, keyed by + // kernel+argIndex. This covers the backbone conv/pool/reorder kernels' + // intermediate+weight+bias buffers, which GetKernelSurfaceParam's BTI-path + // print below does not see. Do not remove. +#if (_DEBUG || _RELEASE_INTERNAL) + { + uint64_t gpuVa = m_renderHal->pOsInterface->pfnGetResourceGfxAddress(m_renderHal->pOsInterface, &surfHandle->second->osSurface->OsResource); + VP_RENDER_NORMALMESSAGE("GetCurbeState: kernel=%s argIdx=%u surfType=%d isOutput=%d gpuVa=0x%llx width=%u height=%u curbeOffset=%u", + m_kernelName.c_str(), arg.uIndex, (int)surfaceParam.surfType, (int)surfaceParam.isOutput, gpuVa, + surfHandle->second->osSurface->dwWidth, surfHandle->second->osSurface->dwHeight, arg.uOffsetInPayload); + } +#endif MHW_INDIRECT_STATE_RESOURCE_PARAMS params = {}; params.isWrite = surfaceParam.isOutput; params.resource = &surfHandle->second->osSurface->OsResource; @@ -368,6 +381,17 @@ VP_RENDER_CHK_NULL_RETURN(surf->second); VP_RENDER_CHK_NULL_RETURN(surf->second->osSurface); + // Permanent -- buffer_compare's curbe_index.py has no other source for resolved real GPU VA + // per BTI-bound (stateful) surface, keyed by kernel+argIndex, so a specific dispatch's + // binding can be cross-checked against a real-hardware page-fault VA. Do not remove. +#if (_DEBUG || _RELEASE_INTERNAL) + { + uint64_t gpuVa = m_renderHal->pOsInterface->pfnGetResourceGfxAddress(m_renderHal->pOsInterface, &surf->second->osSurface->OsResource); + VP_RENDER_NORMALMESSAGE("GetKernelSurfaceParam: kernel=%s isBTI=%d surfType=%d isOutput=%d gpuVa=0x%llx width=%u height=%u", + m_kernelName.c_str(), (int)isBTI, (int)surfType, (int)surfParam.isOutput, gpuVa, + surf->second->osSurface->dwWidth, surf->second->osSurface->dwHeight); + } +#endif pRenderSurfaceParams->MemObjCtl = (m_renderHal->pOsInterface->pfnCachePolicyGetMemoryObject( resourceType, m_renderHal->pOsInterface)) @@ -575,15 +599,18 @@ if (m_kernelEnv.uSimdSize != 1 && m_kernelPerThreadArgInfo.localIdSize > 0) { - if (m_kernelEnv.bHasDPAS) + m_walkerParam.isGenerateLocalID = true; + if (m_renderHal && m_kernelPerThreadArgInfo.localIdSize == m_renderHal->grfSize) { - m_walkerParam.isGenerateLocalID = false; - m_walkerParam.emitLocal = MHW_EMIT_LOCAL_NONE; + m_walkerParam.emitLocal = MHW_EMIT_LOCAL_X; + } + else if (m_renderHal && m_kernelPerThreadArgInfo.localIdSize == 2 * m_renderHal->grfSize) + { + m_walkerParam.emitLocal = MHW_EMIT_LOCAL_XY; } else { - m_walkerParam.isGenerateLocalID = true; - m_walkerParam.emitLocal = MHW_EMIT_LOCAL_XYZ; + m_walkerParam.emitLocal = MHW_EMIT_LOCAL_XYZ; } } m_walkerParam.registersPerThread = m_kernelEnv.uGrfCount;