[Encode] Fix R2R BRC media reset issue
1. Correct VerifySpaceAvailable and return MOS_STATUS_NO_SPACE if not success.
2. Remove unnecessary ReourceSync for rawSurface in 2nd pss.
3. Correct huc packet CalculateCommandBufferSize/CalculatePatchListSize;
4. Remove passNum calculation in CalculateCommandBufferSize/CalculatePatchListSize since packet is added for each pass.
diff --git a/media_driver/agnostic/common/hw/vdbox/mhw_vdbox.h b/media_driver/agnostic/common/hw/vdbox/mhw_vdbox.h
index 32dc565..03d56da 100644
--- a/media_driver/agnostic/common/hw/vdbox/mhw_vdbox.h
+++ b/media_driver/agnostic/common/hw/vdbox/mhw_vdbox.h
@@ -523,6 +523,14 @@
bool bShortFormat = false;
bool bHucDummyStream = false;
bool bSfcInUse = false;
+ uint32_t uNumStoreDataImm = 0;
+ uint32_t uNumStoreReg = 0;
+ uint32_t uNumMfxWait = 0;
+ uint32_t uNumAddConBBEnd = 0;
+ uint32_t uNumMiCopy = 0;
+ uint32_t uNumMiFlush = 0;
+ uint32_t bPerformHucStreamOut = false;
+ uint32_t uNumVdPipelineFlush = 0;
virtual ~MHW_VDBOX_STATE_CMDSIZE_PARAMS() {}
};
using PMHW_VDBOX_STATE_CMDSIZE_PARAMS = MHW_VDBOX_STATE_CMDSIZE_PARAMS * ;
diff --git a/media_driver/agnostic/common/hw/vdbox/mhw_vdbox_huc_generic.h b/media_driver/agnostic/common/hw/vdbox/mhw_vdbox_huc_generic.h
index 7c32958..14f27f1 100644
--- a/media_driver/agnostic/common/hw/vdbox/mhw_vdbox_huc_generic.h
+++ b/media_driver/agnostic/common/hw/vdbox/mhw_vdbox_huc_generic.h
@@ -49,6 +49,7 @@
MI_FLUSH_DW_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
MI_CONDITIONAL_BATCH_BUFFER_END_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
MI_STORE_REGISTER_MEM_CMD_NUMBER_OF_ADDRESSES = 1, // 2 DW for 1 address field
+ MI_COPY_MEM_MEM_CMD_NUMBER_OF_ADDRESSES = 2, // 4 DW for 2 address fields
VD_PIPELINE_FLUSH_CMD_NUMBER_OF_ADDRESSES = 0, // 0 DW for 0 address fields
@@ -94,6 +95,19 @@
uint32_t numStoreDataImm = 1;
uint32_t numStoreReg = 1;
+ MHW_MI_CHK_NULL(commandsSize);
+ MHW_MI_CHK_NULL(patchListSize);
+ MHW_MI_CHK_NULL(params);
+
+ if(params->uNumStoreDataImm)
+ {
+ numStoreDataImm = params->uNumStoreDataImm;
+ }
+ if(params->uNumStoreReg)
+ {
+ numStoreReg = params->uNumStoreReg;
+ }
+
if (mode == CODECHAL_DECODE_MODE_HEVCVLD && params->bShortFormat)
{
numSlices = CODECHAL_HEVC_MAX_NUM_SLICES_LVL_6;
@@ -154,6 +168,12 @@
numStoreDataImm * TMiCmds::MI_STORE_DATA_IMM_CMD::byteSize +
numStoreReg * TMiCmds::MI_STORE_REGISTER_MEM_CMD::byteSize;
+ if(params->uNumMfxWait)
+ {
+ maxSize +=
+ params->uNumMfxWait * TMiCmds::MFX_WAIT_CMD::byteSize;
+ }
+
patchListMaxSize +=
PATCH_LIST_COMMAND(HUC_PIPE_MODE_SELECT_CMD) +
PATCH_LIST_COMMAND(HUC_IMEM_STATE_CMD) +
@@ -165,27 +185,70 @@
numStoreDataImm * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) +
numStoreReg * PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD);
- if (params->bHucDummyStream)
+ if(params->uNumAddConBBEnd)
{
maxSize +=
- THucCmds::HUC_PIPE_MODE_SELECT_CMD::byteSize +
- THucCmds::HUC_IMEM_STATE_CMD::byteSize +
- THucCmds::HUC_DMEM_STATE_CMD::byteSize +
- THucCmds::HUC_VIRTUAL_ADDR_STATE_CMD::byteSize +
- THucCmds::HUC_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
- THucCmds::HUC_STREAM_OBJECT_CMD::byteSize +
- THucCmds::HUC_START_CMD::byteSize +
- TMiCmds::MI_FLUSH_DW_CMD::byteSize;
+ params->uNumAddConBBEnd * TMiCmds::MI_CONDITIONAL_BATCH_BUFFER_END_CMD::byteSize;
patchListMaxSize +=
- PATCH_LIST_COMMAND(HUC_PIPE_MODE_SELECT_CMD) +
- PATCH_LIST_COMMAND(HUC_IMEM_STATE_CMD) +
- PATCH_LIST_COMMAND(HUC_DMEM_STATE_CMD) +
- PATCH_LIST_COMMAND(HUC_VIRTUAL_ADDR_STATE_CMD) +
- PATCH_LIST_COMMAND(HUC_IND_OBJ_BASE_ADDR_STATE_CMD) +
- PATCH_LIST_COMMAND(HUC_STREAM_OBJECT_CMD) +
- PATCH_LIST_COMMAND(HUC_START_CMD) +
- PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
+ params->uNumAddConBBEnd * PATCH_LIST_COMMAND(MI_CONDITIONAL_BATCH_BUFFER_END_CMD);
+ }
+ if(params->uNumMiCopy)
+ {
+ maxSize +=
+ params->uNumMiCopy * TMiCmds::MI_COPY_MEM_MEM_CMD::byteSize;
+
+ patchListMaxSize +=
+ params->uNumMiCopy * PATCH_LIST_COMMAND(MI_COPY_MEM_MEM_CMD);
+ }
+ if(params->uNumMiFlush)
+ {
+ maxSize +=
+ params->uNumMiFlush * TMiCmds::MI_FLUSH_DW_CMD::byteSize;
+
+ patchListMaxSize +=
+ params->uNumMiFlush * PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
+ }
+
+ if (params->bHucDummyStream || params->bPerformHucStreamOut)
+ {
+ uint32_t dummyTimes = params->bPerformHucStreamOut ? 2: 1;
+ for (uint32_t i = 0; i < dummyTimes; i++)
+ {
+ maxSize +=
+ THucCmds::HUC_PIPE_MODE_SELECT_CMD::byteSize +
+ THucCmds::HUC_IMEM_STATE_CMD::byteSize +
+ THucCmds::HUC_DMEM_STATE_CMD::byteSize +
+ THucCmds::HUC_VIRTUAL_ADDR_STATE_CMD::byteSize +
+ THucCmds::HUC_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
+ THucCmds::HUC_STREAM_OBJECT_CMD::byteSize +
+ THucCmds::HUC_START_CMD::byteSize +
+ TMiCmds::MI_FLUSH_DW_CMD::byteSize;
+
+ patchListMaxSize +=
+ PATCH_LIST_COMMAND(HUC_PIPE_MODE_SELECT_CMD) +
+ PATCH_LIST_COMMAND(HUC_IMEM_STATE_CMD) +
+ PATCH_LIST_COMMAND(HUC_DMEM_STATE_CMD) +
+ PATCH_LIST_COMMAND(HUC_VIRTUAL_ADDR_STATE_CMD) +
+ PATCH_LIST_COMMAND(HUC_IND_OBJ_BASE_ADDR_STATE_CMD) +
+ PATCH_LIST_COMMAND(HUC_STREAM_OBJECT_CMD) +
+ PATCH_LIST_COMMAND(HUC_START_CMD) +
+ PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
+ }
+ if (params->bPerformHucStreamOut)
+ {
+ maxSize +=
+ THucCmds::HUC_PIPE_MODE_SELECT_CMD::byteSize +
+ THucCmds::HUC_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
+ THucCmds::HUC_STREAM_OBJECT_CMD::byteSize +
+ 4 * TMiCmds::MI_FLUSH_DW_CMD::byteSize;
+
+ patchListMaxSize +=
+ PATCH_LIST_COMMAND(HUC_PIPE_MODE_SELECT_CMD) +
+ PATCH_LIST_COMMAND(HUC_IND_OBJ_BASE_ADDR_STATE_CMD) +
+ PATCH_LIST_COMMAND(HUC_STREAM_OBJECT_CMD) +
+ 4 * PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
+ }
}
*commandsSize = maxSize;
diff --git a/media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_huc_g12_X.cpp b/media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_huc_g12_X.cpp
index fcf2966..d26b320 100644
--- a/media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_huc_g12_X.cpp
+++ b/media_driver/agnostic/gen12/hw/vdbox/mhw_vdbox_huc_g12_X.cpp
@@ -56,6 +56,12 @@
*commandsSize += mhw_vdbox_vdenc_g12_X::VD_PIPELINE_FLUSH_CMD::byteSize;
*patchListSize += PATCH_LIST_COMMAND(VD_PIPELINE_FLUSH_CMD);
+ if(params->uNumVdPipelineFlush)
+ {
+ *commandsSize += params->uNumVdPipelineFlush * mhw_vdbox_vdenc_g12_X::VD_PIPELINE_FLUSH_CMD::byteSize;
+ *patchListSize += params->uNumVdPipelineFlush * PATCH_LIST_COMMAND(VD_PIPELINE_FLUSH_CMD);
+ }
+
return MOS_STATUS_SUCCESS;
}
diff --git a/media_driver/media_driver_next/agnostic/common/shared/scalability/media_scalability.cpp b/media_driver/media_driver_next/agnostic/common/shared/scalability/media_scalability.cpp
index b91fccc..58c4de4 100644
--- a/media_driver/media_driver_next/agnostic/common/shared/scalability/media_scalability.cpp
+++ b/media_driver/media_driver_next/agnostic/common/shared/scalability/media_scalability.cpp
@@ -119,18 +119,43 @@
requestedSize,
0);
- if (statusPatchList == MOS_STATUS_SUCCESS && statusCmdBuf == MOS_STATUS_SUCCESS)
+ if (statusPatchList != MOS_STATUS_SUCCESS && statusCmdBuf != MOS_STATUS_SUCCESS)
+ {
+ SCALABILITY_CHK_STATUS_RETURN(ResizeCommandBufferAndPatchList(requestedSize + COMMAND_BUFFER_RESERVED_SPACE, requestedPatchListSize));
+ }
+ else if (statusPatchList != MOS_STATUS_SUCCESS)
+ {
+ SCALABILITY_CHK_STATUS_RETURN(ResizeCommandBufferAndPatchList(0, requestedPatchListSize));
+ }
+ else if (statusCmdBuf != MOS_STATUS_SUCCESS)
+ {
+ SCALABILITY_CHK_STATUS_RETURN(ResizeCommandBufferAndPatchList(requestedSize + COMMAND_BUFFER_RESERVED_SPACE, 0));
+ }
+ else
{
// This flag is just a hint for encode, decode/vpp don't use this flag.
singleTaskPhaseSupportedInPak = true;
return eStatus;
}
- requestedSize = requestedSize + COMMAND_BUFFER_RESERVED_SPACE;
-
- SCALABILITY_CHK_STATUS_RETURN(ResizeCommandBufferAndPatchList(requestedSize, requestedPatchListSize));
-
}
+
+ if (requestedPatchListSize)
+ {
+ statusPatchList = (MOS_STATUS)m_osInterface->pfnVerifyPatchListSize(
+ m_osInterface,
+ requestedPatchListSize);
+ }
+ statusCmdBuf = (MOS_STATUS)m_osInterface->pfnVerifyCommandBufferSize(
+ m_osInterface,
+ requestedSize,
+ 0);
+
+ if(statusPatchList != MOS_STATUS_SUCCESS || statusCmdBuf != MOS_STATUS_SUCCESS)
+ {
+ eStatus = MOS_STATUS_NO_SPACE;
+ }
+
return eStatus;
}
