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| <div class="title">VAIQMatrixBufferHEVC Struct Reference<div class="ingroups"><a class="el" href="group__api__dec__hevc.html">HEVC decoding API</a></div></div> </div> |
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| <p>HEVC Inverse Quantization Matrix Buffer Structure. |
| <a href="structVAIQMatrixBufferHEVC.html#details">More...</a></p> |
| |
| <p><code>#include <<a class="el" href="va__dec__hevc_8h_source.html">va_dec_hevc.h</a>></code></p> |
| <table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a> |
| Public Attributes</h2></td></tr> |
| <tr class="memitem:a3815f62017b01731b58c9c8923bfd2eb"><td class="memItemLeft" align="right" valign="top">uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a3815f62017b01731b58c9c8923bfd2eb">ScalingList4x4</a> [6][16]</td></tr> |
| <tr class="memdesc:a3815f62017b01731b58c9c8923bfd2eb"><td class="mdescLeft"> </td><td class="mdescRight">scaling lists, corresponds to same HEVC spec syntax element ScalingList[ i ][ MatrixID ][ j ]. <a href="#a3815f62017b01731b58c9c8923bfd2eb">More...</a><br /></td></tr> |
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| <tr class="memitem:a74c76be0f54c8707653c9d42868ae461"><td class="memItemLeft" align="right" valign="top"><a id="a74c76be0f54c8707653c9d42868ae461"></a> |
| uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a74c76be0f54c8707653c9d42868ae461">ScalingList8x8</a> [6][64]</td></tr> |
| <tr class="memdesc:a74c76be0f54c8707653c9d42868ae461"><td class="mdescLeft"> </td><td class="mdescRight">8x8 scaling, correspongs i = 1, MatrixID is in the range of 0 to 5, inclusive. And j is in the range of 0 to 63, inclusive. <br /></td></tr> |
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| <tr class="memitem:a47ce6d328f642c06638e7ac6f9a29393"><td class="memItemLeft" align="right" valign="top"><a id="a47ce6d328f642c06638e7ac6f9a29393"></a> |
| uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a47ce6d328f642c06638e7ac6f9a29393">ScalingList16x16</a> [6][64]</td></tr> |
| <tr class="memdesc:a47ce6d328f642c06638e7ac6f9a29393"><td class="mdescLeft"> </td><td class="mdescRight">16x16 scaling, correspongs i = 2, MatrixID is in the range of 0 to 5, inclusive. And j is in the range of 0 to 63, inclusive. <br /></td></tr> |
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| <tr class="memitem:a8da1e738f7de0489ba0d9dcf1982a2ca"><td class="memItemLeft" align="right" valign="top"><a id="a8da1e738f7de0489ba0d9dcf1982a2ca"></a> |
| uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a8da1e738f7de0489ba0d9dcf1982a2ca">ScalingList32x32</a> [2][64]</td></tr> |
| <tr class="memdesc:a8da1e738f7de0489ba0d9dcf1982a2ca"><td class="mdescLeft"> </td><td class="mdescRight">32x32 scaling, correspongs i = 3, MatrixID is in the range of 0 to 1, inclusive. And j is in the range of 0 to 63, inclusive. <br /></td></tr> |
| <tr class="separator:a8da1e738f7de0489ba0d9dcf1982a2ca"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:a8e3a754924d149db5619f32dc1a53470"><td class="memItemLeft" align="right" valign="top"><a id="a8e3a754924d149db5619f32dc1a53470"></a> |
| uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a8e3a754924d149db5619f32dc1a53470">ScalingListDC16x16</a> [6]</td></tr> |
| <tr class="memdesc:a8e3a754924d149db5619f32dc1a53470"><td class="mdescLeft"> </td><td class="mdescRight">DC values of the 16x16 scaling lists, corresponds to HEVC spec syntax scaling_list_dc_coef_minus8[ sizeID - 2 ][ matrixID ] + 8 with sizeID = 2 and matrixID in the range of 0 to 5, inclusive. <br /></td></tr> |
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| uint8_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#a56cc54dcf092441ebe57dedabd1bab60">ScalingListDC32x32</a> [2]</td></tr> |
| <tr class="memdesc:a56cc54dcf092441ebe57dedabd1bab60"><td class="mdescLeft"> </td><td class="mdescRight">DC values of the 32x32 scaling lists, corresponds to HEVC spec syntax scaling_list_dc_coef_minus8[ sizeID - 2 ][ matrixID ] + 8 with sizeID = 3 and matrixID in the range of 0 to 1, inclusive. <br /></td></tr> |
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| uint32_t </td><td class="memItemRight" valign="bottom"><a class="el" href="structVAIQMatrixBufferHEVC.html#ae8cf7b8179b871c64d905c1d84e58bb1">va_reserved</a> [<a class="el" href="group__api__core.html#gaaa4fb20d1c2606379cccfa562c2ebb3b">VA_PADDING_LOW</a>]</td></tr> |
| <tr class="memdesc:ae8cf7b8179b871c64d905c1d84e58bb1"><td class="mdescLeft"> </td><td class="mdescRight">Reserved bytes for future use, must be zero. <br /></td></tr> |
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| </table> |
| <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2> |
| <div class="textblock"><p>HEVC Inverse Quantization Matrix Buffer Structure. </p> |
| <p>This structure is sent once per frame, and only when scaling_list_enabled_flag = 1. When sps_scaling_list_data_present_flag = 0, app still needs to send in this structure with default matrix values.</p> |
| <p>Matrix entries are in raster scan order which follows HEVC spec. </p> |
| </div><h2 class="groupheader">Member Data Documentation</h2> |
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| <h2 class="memtitle"><span class="permalink"><a href="#a3815f62017b01731b58c9c8923bfd2eb">◆ </a></span>ScalingList4x4</h2> |
| |
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| <tr> |
| <td class="memname">uint8_t VAIQMatrixBufferHEVC::ScalingList4x4[6][16]</td> |
| </tr> |
| </table> |
| </div><div class="memdoc"> |
| |
| <p>scaling lists, corresponds to same HEVC spec syntax element ScalingList[ i ][ MatrixID ][ j ]. </p> |
| <p>4x4 scaling, correspongs i = 0, MatrixID is in the range of 0 to 5, inclusive. And j is in the range of 0 to 15, inclusive. </p> |
| |
| </div> |
| </div> |
| <hr/>The documentation for this struct was generated from the following file:<ul> |
| <li><a class="el" href="va__dec__hevc_8h_source.html">va_dec_hevc.h</a></li> |
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