Rename registers, set ICACHE_CONTROL before shader
Setting ICACHE_CONTROL before setting the shader instruction address
appears to solve random crashes running this after other rendering.
Also remove annoying "skipped" tests message. Should rework
this at some point to print that when there is no test for a certain
instruction on a platform, but now it's a nuisance.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
diff --git a/src/etnaviv_cl_test_gc2000.c b/src/etnaviv_cl_test_gc2000.c
index 70b19d6..d7e6301 100644
--- a/src/etnaviv_cl_test_gc2000.c
+++ b/src/etnaviv_cl_test_gc2000.c
@@ -147,7 +147,7 @@
etna_set_state(stream, VIVS_PS_CONTROL, 0);
etna_set_state(stream, VIVS_PA_ATTRIBUTE_ELEMENT_COUNT, VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0(0x0) | VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT(0x0));
etna_set_state(stream, VIVS_GL_VARYING_TOTAL_COMPONENTS, VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(0x0));
- etna_set_state(stream, VIVS_PS_UNK01030, 0x0);
+ etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x0);
etna_set_state(stream, VIVS_VS_LOAD_BALANCING, VIVS_VS_LOAD_BALANCING_A(0x42) | VIVS_VS_LOAD_BALANCING_B(0x5) | VIVS_VS_LOAD_BALANCING_C(0x3f) | VIVS_VS_LOAD_BALANCING_D(0xf));
etna_set_state(stream, VIVS_VS_OUTPUT_COUNT, 1);
etna_set_state(stream, VIVS_CL_CONFIG, VIVS_CL_CONFIG_DIMENSIONS(0x1) | VIVS_CL_CONFIG_TRAVERSE_ORDER(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_X(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_Y(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_Z(0x0) | VIVS_CL_CONFIG_VALUE_ORDER(0x3));
diff --git a/src/etnaviv_cl_test_gc3000.c b/src/etnaviv_cl_test_gc3000.c
index 5d9e69a..f36578a 100644
--- a/src/etnaviv_cl_test_gc3000.c
+++ b/src/etnaviv_cl_test_gc3000.c
@@ -58,9 +58,9 @@
etna_set_state(stream, VIVS_GL_VARYING_NUM_COMPONENTS, VIVS_GL_VARYING_NUM_COMPONENTS_VAR0(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR1(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR2(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR3(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR4(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR5(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR6(0x0) | VIVS_GL_VARYING_NUM_COMPONENTS_VAR7(0x0));
etna_set_state(stream, VIVS_GL_UNK03834, 0x0);
etna_set_state(stream, VIVS_VS_NEW_UNK00860, 0x1011);
- etna_set_state(stream, VIVS_PS_UNK01024, 0x0);
+ etna_set_state(stream, VIVS_PS_UNIFORM_BASE, 0x0);
etna_set_state(stream, VIVS_SH_UNIFORMS(1), 0x0);
- etna_set_state(stream, VIVS_VS_UNK00868, 0x21);
+ etna_set_state(stream, VIVS_VS_ICACHE_CONTROL, 0x21);
etna_set_state(stream, VIVS_PS_RANGE, VIVS_PS_RANGE_LOW(0x0) | VIVS_PS_RANGE_HIGH(0xf));
etna_set_state_from_bo(stream, VIVS_PS_INST_ADDR, code, ETNA_RELOC_READ);
etna_set_state(stream, VIVS_PS_INPUT_COUNT, VIVS_PS_INPUT_COUNT_COUNT(1) | VIVS_PS_INPUT_COUNT_UNK8(31));
@@ -68,7 +68,7 @@
etna_set_state(stream, VIVS_PS_CONTROL, 0);
etna_set_state(stream, VIVS_PA_ATTRIBUTE_ELEMENT_COUNT, VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_UNK0(0x0) | VIVS_PA_ATTRIBUTE_ELEMENT_COUNT_COUNT(0x0));
etna_set_state(stream, VIVS_GL_VARYING_TOTAL_COMPONENTS, VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(0x0));
- etna_set_state(stream, VIVS_PS_UNK01030, 0x0);
+ etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x0);
etna_set_state(stream, VIVS_VS_LOAD_BALANCING, VIVS_VS_LOAD_BALANCING_A(0x0) | VIVS_VS_LOAD_BALANCING_B(0x0) | VIVS_VS_LOAD_BALANCING_C(0x3f) | VIVS_VS_LOAD_BALANCING_D(0xf));
etna_set_state(stream, VIVS_VS_OUTPUT_COUNT, 1);
etna_set_state(stream, VIVS_CL_CONFIG, VIVS_CL_CONFIG_DIMENSIONS(0x1) | VIVS_CL_CONFIG_TRAVERSE_ORDER(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_X(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_Y(0x0) | VIVS_CL_CONFIG_SWATH_SIZE_Z(0x0) | VIVS_CL_CONFIG_VALUE_ORDER(0x3));
diff --git a/src/etnaviv_verifyops.c b/src/etnaviv_verifyops.c
index 7ff0fb6..189b30f 100644
--- a/src/etnaviv_verifyops.c
+++ b/src/etnaviv_verifyops.c
@@ -95,6 +95,7 @@
etna_set_state(stream, VIVS_PA_SYSTEM_MODE, VIVS_PA_SYSTEM_MODE_UNK0 | VIVS_PA_SYSTEM_MODE_UNK4);
etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENCL);
+
if (hwt == HWT_GC2000) {
/* Need to write *something* to VS input registers before writing shader uniforms and code. Otherwise
* the whole thing will hang when running this first after boot.
@@ -106,6 +107,7 @@
if (hwt == HWT_GC3000) {
/* GC3000: unified uniforms, shader instructions in memory */
uniform_base = VIVS_SH_UNIFORMS(0);
+ etna_set_state(stream, VIVS_VS_ICACHE_CONTROL, 0x21);
etna_set_state_from_bo(stream, VIVS_PS_INST_ADDR, bo_code, ETNA_RELOC_READ);
} else if (hwt == HWT_GC2000) {
@@ -152,7 +154,7 @@
etna_set_state(stream, VIVS_PS_INPUT_COUNT, VIVS_PS_INPUT_COUNT_COUNT(1) | VIVS_PS_INPUT_COUNT_UNK8(31));
etna_set_state(stream, VIVS_PS_TEMP_REGISTER_CONTROL, VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(10));
etna_set_state(stream, VIVS_PS_CONTROL, 0);
- etna_set_state(stream, VIVS_PS_UNK01030, 0x0);
+ etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x0);
if (hwt == HWT_GC3000) {
/* GC3000: Needs some PA state */
@@ -179,8 +181,7 @@
/* GC3000-only unknown state */
etna_set_state(stream, VIVS_RA_CONTROL, VIVS_RA_CONTROL_UNK0);
- etna_set_state(stream, VIVS_PS_UNK01024, 0x0);
- etna_set_state(stream, VIVS_VS_UNK00868, 0x21);
+ etna_set_state(stream, VIVS_PS_UNIFORM_BASE, 0x0);
/* GC3000 uses the PS_RANGE instead of VS_RANGE for marking the CL shader instruction range */
etna_set_state(stream, VIVS_PS_RANGE, VIVS_PS_RANGE_LOW(0x0) | VIVS_PS_RANGE_HIGH(num_inst - 2));
/* GC3000: Needs PS output register */
@@ -765,8 +766,6 @@
continue;
if (op_tests[t].hardware_type & hwt) {
perform_test(hwt, info, &op_tests[t], reps);
- } else {
- printf("%s: (skipped)\n", op_tests[t].op_name);
}
}
